参数资料
| 型号： | KAD5514P-12Q72 |
| 厂商： | Intersil |
| 文件页数： | 14/34页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 125MSPS SGL 72-QFN |
| 产品培训模块： | High-Speed Analog-to-Digital Converters |
| 标准包装： | 1 |
| 系列： | FemtoCharge™ |
| 位数： | 14 |
| 采样率（每秒）： | 125M |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 376mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 72-VFQFN 裸露焊盘 |
| 供应商设备封装： | 72-QFN（10x10） |
| 包装： | 托盘 |
| 输入数目和类型： | 1 个差分，单极 |
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21
FN6804.2
September 10, 2009
Nap/Sleep
Portions of the device may be shut down to save power during
times when operation of the ADC is not required. Two power
saving modes are available: Nap, and Sleep. Nap mode
reduces power dissipation to less than 163mW and recovers
to normal operation in approximately 1s. Sleep mode
reduces power dissipation to less than 6mW but requires
approximately 1ms to recover from a sleep command.
Wake-up time from sleep mode is dependent on the state of
CSB; in a typical application CSB would be held high during
sleep, requiring a user to wait 150s max after CSB is
asserted (brought low) prior to writing ‘001x’ to SPI
Register 25. The device would be fully powered up, in
normal mode 1ms after this command is written.
Wake-up from Sleep Mode Sequence (CSB high)
Pull CSB Low
Wait 150us
Write ‘001x’ to Register 25
Wait 1ms until ADC fully powered on
In an application where CSB was kept low in sleep mode, the
150s CSB setup time is not required as the SPI registers are
powered on when CSB is low, the chip power dissipation
increases by ~ 15mW in this case. The 1ms wake-up time
after the write of a ‘001x’ to register 25 still applies. It is
generally recommended to keep CSB high in sleep mode to
avoid any unintentional SPI activity on the ADC.
All digital outputs (Data, CLKOUT and OR) are placed in a
high impedance state during Nap or Sleep. The input clock
should remain running and at a fixed frequency during Nap
or Sleep, and CSB should be high. Recovery time from Nap
mode will increase if the clock is stopped, since the internal
DLL can take up to 52s to regain lock at 250MSPS.
By default after the device is powered on, the operational
state is controlled by the NAPSLP pin as shown in Table 3.
The power-down mode can also be controlled through the
SPI port, which overrides the NAPSLP pin setting. Details on
this are contained in the “Serial Peripheral Interface” on
page 22. This is an indexed function when controlled from
the SPI, but a global function when driven from the pin.
Data Format
Output data can be presented in three formats: two’s
complement, Gray code and offset binary. The data format is
selected via the OUTFMT pin as shown in Table 4.
The data format can also be controlled through the SPI port,
which overrides the OUTFMT pin setting. Details on this are
contained in the “Serial Peripheral Interface” on page 22.
Offset binary coding maps the most negative input voltage to
code 0x000 (all zeros) and the most positive input to 0xFFF
(all ones). Two’s complement coding simply complements
the MSB of the offset binary representation.
When calculating Gray code the MSB is unchanged. The
remaining bits are computed as the XOR of the current bit
position and the next most significant bit. Figure 33 shows
this operation.
Converting back to offset binary from Gray code must be
done recursively, using the result of each bit for the next
lower bit as shown in Figure 34.
TABLE 3. NAPSLP PIN SETTINGS
NAPSLP PIN
MODE
AVSS
Normal
Float
Sleep
AVDD
Nap
TABLE 4. OUTFMT PIN SETTINGS
OUTFMT PIN
MODE
AVSS
Offset Binary
Float
Two’s Complement
AVDD
Gray Code
FIGURE 33. BINARY TO GRAY CODE CONVERSION
12
13
11
0
1
BINARY
12
13
11
0
GRAY CODE
1
KAD5514P
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KAD5514P-17Q48 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:14-Bit, 250/210/170/125MSPS ADC |
| KAD5514P-17Q72 | 制造商:Intersil Corporation 功能描述:14-BIT, 170MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 170MSPS SGL 72-QFN |
| KAD5514P-21Q48 | 制造商:Intersil Corporation 功能描述:14-BIT, 210MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 210MSPS SGL 48-QFN |
| KAD5514P-21Q72 | 制造商:Intersil Corporation 功能描述:14-BIT, 210MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 210MSPS SGL 72-QFN |
| KAD5514P-25Q48 | 制造商:Intersil Corporation 功能描述:14-BIT, 250MSPS SINGLE-CHANNEL ADC, PROGRAMMABLE LVDS/LVCMOS - Rail/Tube 制造商:Intersil Corporation 功能描述:IC ADC 14BIT 250MSPS SGL 48-QFN 制造商:Intersil Corporation 功能描述:IC, ADC, 14BIT, Resolution (Bits):14bit, Sampling Rate:250MSPS, Supply Voltage T 制造商:Intersil Corporation 功能描述:IC, ADC, 14BIT, Resolution (Bits):14bit, Sampling Rate:250MSPS, Supply Voltage Type:Single, Supply Voltage Min:1.7V, Supply Voltage Max:1.9V, Supply Current:170mA, Digital IC Case Style:QFN, No. of Pins:48, Data Interface:SPI, MSL:- , RoHS Compliant: Yes |
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