参数资料
型号: KIT18730EPEVBE
厂商: Freescale Semiconductor
文件页数: 18/35页
文件大小: 0K
描述: KIT FOR MPC18730 PMIC
标准包装: 1
主要目的: DC/DC,LDO 步降
输出及类型: 5,非隔离
稳压器拓扑结构: 降压
频率 - 开关: 200kHz
板类型: 完全填充
已供物品: 板,软件
已用 IC / 零件: MPC18730
相关产品: MPC18730EPR2-ND - IC PMIC PROGR 5-OUTPUTS 64-QFN
MPC18730EP-ND - IC PMIC PROGR 5-OUTPUTS 64-QFN
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
capacitor which is connected to V_STDBY. When using
Ni_mh, short-circuit VBATT and LVB to external components
and HVB to GND. When using Li_ion, short-circuit HVB to
voltage is output from V_STDBY in Standby mode. When
using Li-Ion, 50% of the VBATT voltage is output to
V_STDBY pin in Standby Mode.
VBATT, and leave LVB open. When using Ni_MH, the VB
Table 8. HVB and LVB Connection
MODE
Li_ion
Ni_mh
HVB
VBATT (27)
GND
LVB
open
VBATT (27)
Notes
27. Externally connect to VBATT.
Table 9. V_STDBY and LSWO Operation
INPUT
OUTPUT
WAKE(Int)
L
H
H
H
PGOOD2(Int)
X
L
H
H
CLEAR
X
X
L
H
V_STDBY
VBATT
VBATT
VO1_SENSE
VO1_SENSE
LSWO
Z
Z
Z
L
Z : High Impedance, X : Don’t care
RESET CIRCUIT
PGOOD1_DELAY,
PGOOD2_DELAY
VO1_SENSE,
VO1_SENSE
VO2_SENSE
VGATE
PGOOD1, 2
RESET1_TH
(PGOOD1 side only)
VO1_SENSE
BANDGAP
Reset
Control
PGOOD1, 2B(Int)
PGOOD1_DELAY,
PGOOD2_DELAY
REFERENCE
Figure 8. Reset Circuit Block Diagram
When the VO1_SENSE or VO2_SENSE voltage is higher
than the reference value, PGOOD1 or 2B goes High. When
PGOOD1(int) is Low and PGOOD1 is High, SLEEP(int) is
forced to place the chip into the standby mode.
Connect a capacitor between RESET1_TH and
PGOOD_DELAY. The capacitor is not necessary if a resistor
of 330K ? or less is inserted between RESET1_TH and
VO1_SENSE for reset adjustment
Connect the capacitor between RESET1_TH and PGOOD
as directed below.
When SEQ_SELECT is Low:Between RESET1_TH and
PGOOD1_DELAY
When SEQ_SELECT is High:Between RESET1_TH and
PGOOD2_DELAY
Use a capacitor with approximately half of the capacitance
between PGOOD_DELAY and GND
18730
Analog Integrated Circuit Device Data
18
Freescale Semiconductor
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