参数资料
型号: KIT18730EPEVBE
厂商: Freescale Semiconductor
文件页数: 26/35页
文件大小: 0K
描述: KIT FOR MPC18730 PMIC
标准包装: 1
主要目的: DC/DC,LDO 步降
输出及类型: 5,非隔离
稳压器拓扑结构: 降压
频率 - 开关: 200kHz
板类型: 完全填充
已供物品: 板,软件
已用 IC / 零件: MPC18730
相关产品: MPC18730EPR2-ND - IC PMIC PROGR 5-OUTPUTS 64-QFN
MPC18730EP-ND - IC PMIC PROGR 5-OUTPUTS 64-QFN
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 21. VO2_SENSE Output Voltage Register
0100
Data1
Data2
Bit
Name
Default
3
VO2_SENSE
[6]
1
2
VO2_SENSE
[5]
0
1
VO2_SENSE
[4]
0
0
VO2_SENSE
[3]
0
3
VO2_SENSE
[2]
0
2
VO2_SENSE
[1]
0
1
VO2_SENSE
[0]
0
0
S_Off_VO2_SENSE
0
VO2_SENSE[6]: Reference DAC MSB
1 = VO2_SENSE[6] on
0 = VO2_SENSE[6] off
VO2_SENSE[5]: Reference DAC Bit5
1 = VO2_SENSE[5] on
0 = VO2_SENSE[5] off
VO2_SENSE[4]: Reference DAC Bit4
1 = VO2_SENSE[4] on
0 = VO2_SENSE[4] off
VO2_SENSE[3]: Reference DAC Bit3
1 = VO2_SENSE[3] on
0 = VO2_SENSE[3] off
VO2_SENSE[2]: Reference DAC Bit2
1 = VO2_SENSE[2] on
0 = VO2_SENSE[2] off
Table 22. Regulator1 Output Voltage Register
VO2_SENSE[1]: Reference DAC Bit1
1 = VO2_SENSE[1] on
0 = VO2_SENSE[1] off
VO2_SENSE [0]: Reference DAC LSB
1 = VO2_SENSE [0] on
0 = VO2_SENSE [0] off
S_Off_VO2_SENSE: DDC2 Top side & LG (Ni_mh) /
Bottom side (Li_ion) transistor off
1 = Synchronous Rectification Off
0 = Synchronous Rectification On
Refer to Table 11, Output Voltage of VO2_SENSE on
page 20 for the correspondence between the output voltage
and register settings.
0101
Data1
Data2
Bit
Name
Default
3
SREG1_V[6]
1
2
SREG1_V[5]
1
1
SREG1_V[4]
1
0
SREG1_V[3]
1
3
SREG1_V[2]
1
2
SREG1_V[1]
1
1
SREG1_V[0]
1
0
Reserved
1
SREG1_V[6]: Reference DAC MSB
1 = SREG1_V[6] on
0 = SREG1_V[6] off
SREG1_V[5]: Reference DAC Bit5
1 = SREG1_V[5] on
0 = SREG1_V[5] off
SREG1_V[4]: Reference DAC Bit4
1 = SREG1_V[4] on
0 = SREG1_V[4] off
SREG1_V[3]: Reference DAC Bit3
1 = SREG1_V[3] on
0 = SREG1_V[3] off
SREG1_V[2] : Reference DAC Bit2
1 = SREG1_V[2] on
0 = SREG1_V[2] off
SREG1 [1]: Reference DAC Bit1
1 = SREG1_V[1] on
0 = SREG1_V[1] off
SREG1_V[0]: Reference DAC LSB
1 = SREG1_V[0] on
0 = SREG1_V[0] off
Reserved : Blank register bit (Freescale Pre-Defined
Register)
1 = Preferred
0 = Forbidden
Note: Do NOT change Reserved Register from default
value.
Refer to Table 12, Output Voltage of SREG1 on page 20
for the correspondence between the output voltage and
register settings.
18730
Analog Integrated Circuit Device Data
26
Freescale Semiconductor
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