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参数资料
| 型号： | KIT33989DWEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 43/72页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33989DW HS SBC |
| 标准包装： | 1 |
| 主要目的： | 接口，CAN 控制器 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | MC33989 |
| 主要属性： | CAN 2.0 系统基础芯片（SBC），SPI 接口，2 低压降稳压器 |
| 次要属性： | 故障检测，睡眠和待机模式 |
| 已供物品： | 板，CD |
| 相关产品： | MC33989DWR2CT-ND - IC SYSTEM BASE W/CAN 28-SOIC MC33989DWR2TR-ND - IC SYSTEM BASE W/CAN 28-SOIC MC33989DW-ND - IC SYSTEM BASE W/CAN 28-SOIC |
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Analog Integrated Circuit Device Data
48
Freescale Semiconductor
33989
TYPICAL APPLICATIONS
SUPPLEMENTAL APPLICATION NOTES
T1: Is dependent on the selected cyclic sense timing in the TIM2 register (5.0 to 400 ms). LX is sampled
10 s before the end of cyclic sense on time. If the LX correct wake-up level happens just after the sample point, the wake-
up will be detected at the next HS1 activation and a complete period is lost.
T2: It is the same time as LX to VDD1 turn on: typ 100 s
T3 & T4: same as page 42
The total time is 11.5 ms (for a cyclic sense total time of 5.0 ms) in this example.
WAKE-UP TIMING: STOP MODE
The following paragraphs describe the wake-up events from stop mode, and the sequence of the signals at the SBC level. The
wake-up time described is the time from the wake-up event to the SBC INT pin. The wake-up time is the sum of several timings:
wake-up signal detection, the INT pulse, and a minimum delay between INT and SBC ready to operate. At the end of the wake-
up time, the SBC is ready to operate, however the MCU might have already been in a restart operation.
LX Wake-up
Below is the case where the SBC is in stop mode and is awakened by an LX positive edge
T1(L0 high level to INT pulse): typ 100 s.
The total time is 133 s in this case.
Figure 29. Lx Wake-up
CAN Wake-up
The case below describes the signal for CAN wake-up. Refer to page 53 for more details on CAN wake-up signals and the
TCAN analysis.
Figure 30. CAN Wake-up
TCAN
: refer to page 53 for more details.
T1: Third pulse on CAN to INT pulse: typ 80 s.
The total time is 113 s in this case.
CS Wake-up
The figure below describes the wake up from a CS signal transition, while the SBC is in Stop mode.
L0
INT
SBC ready to accept SPI command.
t1
Wake-up signalled to MCU.
tINT + tS-1STSPI (33μs max)
CAN
INT
t1
SBC ready to accept SPI command.
Wake-up signalled to MCU.
tCAN
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