参数资料
型号: KS8993M
厂商: Micrel Inc
文件页数: 26/85页
文件大小: 0K
描述: IC SWITCH 10/100 3PORT 128PQFP
标准包装: 66
系列: *
类型: *
应用: *
安装类型: 表面贴装
封装/外壳: 128-BFQFP
供应商设备封装: 128-PQFP(14x20)
包装: 管件
配用: 576-1013-ND - BOARD EVAL EXPERIMENT KS8993M
Micrel, Inc.
KS8993M/ML/MI
April 2005
32
M9999-041205
The MIIM interface consists of the following:
A physical connection that incorporates the data line (MDIO) and the clock line (MDC).
A specific protocol that operates across the aforementioned physical connection that allows an external
controller to communicate with the KS8993M device.
Access to a set of six 16-bits registers, consisting of standard MIIM registers [0:5].
The following table depicts the MII Management Interface frame format.
Preamble
Start of
Frame
Read/Write
OP Code
PHY
Address
Bits [4:0]
REG
Address
Bits [4:0]
TA
Data
Bits [15:0]
Idle
Read
32 1’s
01
10
xx0AA
RRRRR
Z0
DDDDDDDD_DDDDDDDD
Z
Write
32 1’s
01
xx0AA
RRRRR
10
DDDDDDDD_DDDDDDDD
Z
Table 5. MII Management Interface Frame Format
For the KS8993M, MIIM register access is selected when bit 2 of the PHY address is set to ‘0’. PHY address bits
[4:3] are not defined for MIIM register access, and hence can be set to either 0’s or 1’s in read/write operation.
Serial Management Interface (SMI)
The SMI is the KS8993M non-standard MIIM interface that provides access to all KS8993M configuration
registers. This interface allows an external device to completely monitor and control the states of the KS8993M.
The SMI interface consists of the following:
A physical connection that incorporates the data line (MDIO) and the clock line (MDC).
A specific protocol that operates across the aforementioned physical connection that allows an external
controller to communicate with the KS8993M device.
Access to all KS8993M configuration registers. Registers access includes the Global, Port and
Advanced Control Registers 0-127 (0x00 – 0x7F), and indirect access to the standard MIIM registers
[0:5].
The following table depicts the SMI frame format.
Preamble
Start of
Frame
Read/Write
OP Code
PHY
Address
Bits [4:0]
REG
Address
Bits [4:0]
TA
Data
Bits [15:0]
Idle
Read
32 1’s
01
10
RR1xx
RRRRR
Z0
0000_0000_DDDD_DDDD
Z
Write
32 1’s
01
RR1xx
RRRRR
10
xxxx_xxxx_DDDD_DDDD
Z
Table 6. Serial Management Interface (SMI) Frame Format
For the KS8993M, SMI register access is selected when bit 2 of the PHY address is set to ‘1’. PHY address bits
[1:0] are not defined for SMI register access, and hence can be set to either 0’s or 1’s in read/write operation.
To access the KS8993M registers 0-127 (0x00 – 0x7F), the following applies:
PHYAD[4:3] and REGAD[4:0] are concatenated to form the 7-bits address; that is, {PHYAD[4:3],
REGAD[4:0]} = bits [6:0] of the 7-bits address.
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KS8993M_11 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Integrated 3-Port 10/100 Managed Switch with PHYs
KS8993MA5 功能描述:IC SWITCH 3-PORT 10/100 128-PQFP RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA(27x27) 包装:散装
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KS8993MI 功能描述:IC SWITCH 10/100 3PORT 128PQFP RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA(27x27) 包装:散装
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