参数资料
型号: KSZ8041RNL
厂商: Micrel Inc
文件页数: 10/54页
文件大小: 0K
描述: TXRX 10/100 3.3V PHY RMII 32-MLF
标准包装: 640
类型: 收发器
驱动器/接收器数: 1/1
规程: RMII
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,32-MLF?
供应商设备封装: 32-MLF?(5x5)
包装: 托盘
配用: 576-3863-ND - BOARD EVALUATION FOR KSZ8041RNL
其它名称: 576-3503
Micrel, Inc.
KSZ8041NL/RNL
September 2010
18
M9999-090910-1.4
Pin Description – KSZ8041RNL (Continued)
Pin Number
Pin Name
Type
(1)
Pin Function
31
LED1 /
SPEED
Ipu/O
LED Output:
Programmable LED1 Output /
Config Mode:
Latched as SPEED (register 0h, bit 13) during power-up / reset.
See “Strapping Options” section for details.
The LED1 pin is programmable via register 1Eh bits [15:14], and is defined as
follows.
LED mode = [00]
Speed
Pin State
LED Definition
10BT
H
OFF
100BT
L
ON
LED mode = [01]
Activity
Pin State
LED Definition
No Activity
H
OFF
Activity
Toggle
Blinking
LED mode = [10], [11]
Reserved
32
RST#
I
Chip Reset (active low)
PADDLE
GND
Gnd
Ground
Notes:
1.
P = Power supply.
Gnd = Ground.
I = Input.
O = Output.
I/O = Bi-directional.
Opu = Output with internal pull-up (40K +/-30%).
Ipu/O = Input with internal pull-up (40K +/-30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (40K +/-30%) during power-up/reset; output pin otherwise.
2.
RMII Rx Mode: The RXD[1:0] bits are synchronous with REF_CLK. For each clock period in which CRS_DV is asserted, two bits of
recovered data are sent from the PHY.
3.
RMII Tx Mode: The TXD[1:0] bits are synchronous with REF_CLK. For each clock period in which TX_EN is asserted, two bits of data are
received by the PHY from the MAC.
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