参数资料
型号: KSZ8842-16MQL-EVAL
厂商: Micrel Inc
文件页数: 113/141页
文件大小: 0K
描述: BOARD EVALUATION KSZ8842-16MQL
标准包装: 1
主要目的: 接口,以太网控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8842-16MQL
主要属性: 2 个端口,100BASE-TX/10BASE-T,管理型
次要属性: 8/16 位接口,LinkMD 线缆诊断
已供物品: 板,CD,文档,电源
产品目录页面: 1114 (CN2011-ZH PDF)
相关产品: 576-3076-ND - IC MAC CTLR 2PORT ETH 100-LFBGA
KSZ8842-32MQLA6-ND - IC SWITCH 10/100 32BIT 128PQFP
576-1479-ND - IC SWITCH 10/100 32BIT 128PQFP
576-1478-5-ND - IC SWITCH 10/100 16BIT 128PQFP
其它名称: 576-1634
Micrel, Inc.
KSZ8842-16/32 MQL/MVL/MVLI/MBL
October 2007
73
M9999-102207-1.9
Bank 19 Multicast Table Register 3 (0x06): MTR3
Multicast table register 3.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
MTR0 Multicast Table 3
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXRA) or receive multicast (RXRM) bit is set in the RXCR,
all multicast addresses are received regardless of the multicast table value.
Banks 20 – 31: Reserved
Except Bank Select Register (0xE).
Bank 32 Switch ID and Enable Register (0x00): SIDER
This register contains the switch ID and the switch enable control.
Bit
Default
R/W
Description
15-8
0x88
RO
Family ID
Chip family ID
7-4
0x0
RO
Chip ID
0x0 is assigned to KSZ8842M
3-1
0x1
RO
Revision ID
0
RW
Start Switch
1 = start the chip.
0 = switch is disabled.
Bank 32 Switch Global Control Register 1 (0x02): SGCR1
This register contains the global control for the switch function.
Bit
Default
R/W
Description
15
0
RW
Pass All Frames
1 = switch all packets including bad ones. Used solely for debugging purposes. Works
in conjunction with Sniffer mode only.
14
0
RW
Reserved
13
1
RW
IEEE 802.3x Transmit Direction Flow Control Enable
1 = enables transmit direction flow control feature.
0 = will not enable transmit direction flow control feature. The switch will not generate
any flow control packets.
12
1
RW
IEEE 802.3x Receive Direction Flow Control Enable
1 = enables receive direction flow control feature.
0 = will not enable receive direction flow control feature. The switch will not react to
any received flow control packets.
11
0
RW
Frame Length Field Check
1 = checks frame length field in the IEEE packets. If the actual length does not match,
the packet will be dropped (for Length/Type field < 1500).
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