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| 型号： | KSZ8851-16MLL-EVAL |
| 厂商： | Micrel Inc |
| 文件页数： | 24/84页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION KSZ8851-16MLL |
| 产品培训模块： | KSZ8851 10/100 Embedded Controllers |
| 标准包装： | 1 |
| 系列： | LinkMD® |
| 主要目的： | 接口，以太网控制器（PHY 和 MAC） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8851-16MLL |
| 主要属性： | 1 个端口，100BASE-TX/10BASE-T |
| 次要属性： | 8/16 位接口，LinkMD 线缆诊断 |
| 已供物品： | 板，文档 |
| 产品目录页面： | 1081 (CN2011-ZH PDF) |
| 相关产品： | 576-3438-ND - IC CTLR MAC/PHY NON PCI 128PQFP 576-3253-ND - IC CTLR MAC/PHY NON-PCI 128-PQFP 576-3252-ND - IC CTLR MAC/PHY NON-PCI 48-LQFP |
| 其它名称： | 576-3292 |
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Micrel, Inc.
KSZ8851-16MLL/MLLI
March 11, 2014
30
Revision 2.2
Driver Routine for Receive Packet from KSZ8851-16MLL to Host Processor
The software driver receives data packet frames from the KSZ8851-16MLL device either as a result of polling or an
interrupt based service. When an interrupt is received, the OS invokes the interrupt service routine that is in the interrupt
vector table.
If your system has OS support, to minimize interrupt lockout time, the interrupt service routine should handle at interrupt
level only those tasks that require minimum execution time, such as error checking or device status change. The routine
should queue all the time-consuming work to transfer the packet from the KSZ8851-16MLL RXQ into system memory at
task level. The following Figure 8 shows the step-by-step for receive packets from KSZ8851-16MLL to host processor.
Note: Each DMA read operation from the host CPU to read RXQ frame buffer, the first read data (byte in 8-bit bus mode,
word in 16-bit bus mode and double word in 32-bit bus mode) is dummy data and must be discarded by host CPU.
Afterward, host CPU must read each frame data to align with double word boundary at end. For example, the host CPU
has to read up to 68 bytes if received frame is 65 bytes.
Figure 8. Host RX Single or Multiple Frames in Auto-Dequeue Flow Diagram
To program Rx frame count threshold in
RXFCTR, Rx data byte count threshold in
RXDBCTR or Rx frame duration timer
threshold in RXDTTR.
Enable all thresholds bits in RXQCR[5:7].
Set bit 4 in RXQCR to enable RXQ frame
buffer auto-dequeue
Enable Rx interrupt in IER[13]
Is Rx interrupt status bit set in
ISR[13] when interrupt asserted?
Rx interrupt source can be read from
bits in RXQCR[10:12]. Mask out further
Rx interrupt by set bit 13 to 0 in IER
and clear Rx interrupt status by write 1
to bit 13 in ISR.
Read total Rx frame count in RXFCTR
and read Rx frame header status in
RXFHSR and byte count in RXFHBCR.
Write 0x000 to RXFDPR[10:0] to clear
RX frame pointer
Write an “1” to RXQCR[3] reg to enable
RXQ read access, the Host CPU starts
read frame data from RXQ buffer.
Write an “0” to RXQCR[3] reg to end
RXQ read access
Yes
Is all Rx frames read?
No
Yes
No
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KSZ8851-16MLL-EVAL | 制造商:Micrel Inc 功能描述:BOARD EVALUATION FOR KSZ8851-16MLL |
| KSZ8851-16MLLI | 功能描述:以太网 IC 10/100BT Ethernet MAC + PHY with Generic (8, 16-bit) Bus Interface (I-Temp, Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8851-16MLLI TR | 功能描述:以太网 IC 10/100BT Ethernet MAC + PHY with Generic (8, 16-bit) Bus Interface (I-Temp, Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8851-16MLLJ | 功能描述:以太网 IC Single-Port Ethernet MAC Controller with 8/16-Bit Non-PCI Interface (125C support) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8851-16MLLJ_10 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface |
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