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| 型号： | KSZ8851-16MLL-EVAL |
| 厂商： | Micrel Inc |
| 文件页数： | 34/84页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION KSZ8851-16MLL |
| 产品培训模块： | KSZ8851 10/100 Embedded Controllers |
| 标准包装： | 1 |
| 系列： | LinkMD® |
| 主要目的： | 接口，以太网控制器（PHY 和 MAC） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8851-16MLL |
| 主要属性： | 1 个端口，100BASE-TX/10BASE-T |
| 次要属性： | 8/16 位接口，LinkMD 线缆诊断 |
| 已供物品： | 板，文档 |
| 产品目录页面： | 1081 (CN2011-ZH PDF) |
| 相关产品： | 576-3438-ND - IC CTLR MAC/PHY NON PCI 128PQFP 576-3253-ND - IC CTLR MAC/PHY NON-PCI 128-PQFP 576-3252-ND - IC CTLR MAC/PHY NON-PCI 48-LQFP |
| 其它名称： | 576-3292 |
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Micrel, Inc.
KSZ8851-16MLL/MLLI
March 11, 2014
4
Revision 2.2
Contents
List of Figures.......................................................................................................................................................................... 7
List of Tables ........................................................................................................................................................................... 8
Pin Configuration..................................................................................................................................................................... 9
Pin Description ...................................................................................................................................................................... 10
Pin for Strap-In Options......................................................................................................................................................... 13
Functional Description........................................................................................................................................................... 14
Functional Overview.............................................................................................................................................................. 14
Rx unused block disabled............................................................................................................................................. 14
Wake-up Packet ........................................................................................................................................................... 16
Physical Layer Transceiver (PHY) ........................................................................................................................................ 17
Straight Cable ............................................................................................................................................................... 18
Crossover Cable ........................................................................................................................................................... 19
Access .......................................................................................................................................................................... 21
Usage ........................................................................................................................................................................... 21
Frame Queue (RXQ) Frame Format ............................................................................................................................ 29
EEPROM Interface ....................................................................................................................................................... 31
CPU Interface I/O Registers.................................................................................................................................................. 33
I/O Registers................................................................................................................................................................. 33
Internal I/O Registers Space Mapping ......................................................................................................................... 33
CIDER ................................................................................................................................................................................... 37
0x887x................................................................................................................................................................................... 37
Reserved ............................................................................................................................................................................... 38
Do Not Care .......................................................................................................................................................................... 38
None ...................................................................................................................................................................................... 38
Register Map: MAC, PHY and QMU ..................................................................................................................................... 39
Bit Type Definition ........................................................................................................................................................ 39
0x00 – 0x07: Reserved................................................................................................................................................. 39
Chip Configuration Register (0x08 – 0x09): CCR ........................................................................................................ 39
0x0A – 0x0F: Reserved ................................................................................................................................................ 39
Host MAC Address Registers: MARL, MARM and MARH ........................................................................................... 40
Host MAC Address Register Low (0x10 – 0x11): MARL.............................................................................................. 40
Host MAC Address Register Middle (0x12 – 0x13): MARM......................................................................................... 40
Host MAC Address Register High (0x14 – 0x15): MARH ............................................................................................ 40
0x16 – 0x1F: Reserved ................................................................................................................................................ 40
On-Chip Bus Control Register (0x20 – 0x21): OBCR .................................................................................................. 41
EEPROM Control Register (0x22 – 0x23): EEPCR ..................................................................................................... 41
Memory BIST Info Register (0x24 – 0x25): MBIR ........................................................................................................ 42
Global Reset Register (0x26 – 0x27): GRR ................................................................................................................. 42
0x28 – 0x29: Reserved................................................................................................................................................. 42
Wakeup Frame Control Register (0x2A – 0x2B): WFCR ............................................................................................. 43
0x2C – 0x2F: Reserved ................................................................................................................................................ 43
Wakeup Frame 0 CRC0 Register (0x30 – 0x31): WF0CRC0 ...................................................................................... 43
Wakeup Frame 0 CRC1 Register (0x32 – 0x33): WF0CRC1 ...................................................................................... 43
Wakeup Frame 0 Byte Mask 0 Register (0x34 – 0x35): WF0BM0 .............................................................................. 44
Wakeup Frame 0 Byte Mask 1 Register (0x36 – 0x37): WF0BM1 .............................................................................. 44
Wakeup Frame 0 Byte Mask 2 Register (0x38 – 0x39): WF0BM2 .............................................................................. 44
Wakeup Frame 0 Byte Mask 3 Register (0x3A – 0x3B): WF0BM3.............................................................................. 44
0x3C – 0x3F: Reserved ................................................................................................................................................ 44
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相关代理商/技术参数 |
参数描述 |
|---|---|
| KSZ8851-16MLL-EVAL | 制造商:Micrel Inc 功能描述:BOARD EVALUATION FOR KSZ8851-16MLL |
| KSZ8851-16MLLI | 功能描述:以太网 IC 10/100BT Ethernet MAC + PHY with Generic (8, 16-bit) Bus Interface (I-Temp, Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8851-16MLLI TR | 功能描述:以太网 IC 10/100BT Ethernet MAC + PHY with Generic (8, 16-bit) Bus Interface (I-Temp, Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8851-16MLLJ | 功能描述:以太网 IC Single-Port Ethernet MAC Controller with 8/16-Bit Non-PCI Interface (125C support) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8851-16MLLJ_10 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface |
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