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| 型号： | KSZ9021RLI |
| 厂商： | Micrel Inc |
| 文件页数： | 39/58页 |
| 文件大小： | 0K |
| 描述： | TXRX ETHERNET GB RGMII 64-LQFP |
| 标准包装： | 160 |
| 类型： | 收发器 |
| 驱动器/接收器数： | 8/8 |
| 规程： | 千兆位以太网 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP 裸露焊盘 |
| 供应商设备封装： | 64-E-LQFP |
| 包装： | 托盘 |
| 其它名称： | 576-3636 KSZ9021RLI-ND |
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MCP444X/446X
DS22265A-page 44
2010 Microchip Technology Inc.
4.2.2.1
Status (STATUS) Register
This register contains 7 status bits. These bits show the
state of the WiperLock bits, the Write Protect bit, and if
an EEPROM write cycle is active. The STATUS register
can be accessed via the READ commands. Register 4-
1 describes each STATUS register bit.
The STATUS register is placed at Address 05h.
REGISTER 4-1:
STATUS REGISTER
R-1
R-0
R-x
R-1
R-x
D8:D7
WL3 (1)
WL2 (1)
EEWA
WL1 (1)
WL0 (1)
—WP (1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 8-7
D8:D7:
Reserved. Forced to “1”
bit 6
WL3:
WiperLock Status bit for Resistor Network 3 (Refer to Section 5.3 “WiperLock Technology” for
further information)
The WiperLock Technology bit (WL3) prevents the Volatile and Nonvolatile Wiper 3 addresses and the
TCON1 register bits R3HW, R3A, R3W, and R3B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1
= Wiper and TCON1 register bits R3HW, R3A, R3W, and R3B of Resistor Network 3 (Pot 3) are
“Locked” (Write Protected)
0
= Wiper and TCON1 of Resistor Network 3 (Pot 3) can be modified
Note:
The WL3 bit always reflects the result of the last programming cycle to the nonvolatile WL3
bit. After a POR/BOR or RESET pin event, the WL3 bit is loaded with the nonvolatile WL3 bit
value.
bit 5
WL2:
WiperLock Status bit for Resistor Network 2 (Refer to Section 5.3 “WiperLock Technology” for
further information)
The WiperLock Technology bit (WL2) prevents the Volatile and Nonvolatile Wiper 2 addresses and the
TCON1 register bits R2HW, R2A, R2W, and R2B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1
= Wiper and TCON1 register bits R2HW, R2A, R2W, and R2B of Resistor Network 2 (Pot 2) are
“Locked” (Write Protected)
0
= Wiper and TCON1 of Resistor Network 2 (Pot 2) can be modified
Note:
The WL0 bit always reflects the result of the last programming cycle to the nonvolatile WL0
bit. After a POR/BOR or RESET pin event, the WL0 bit is loaded with the nonvolatile WL0 bit
value.
bit 4
EEWA:
EEPROM Write Active Status bit
This bit indicates if the EEPROM Write Cycle is occurring.
1
= An EEPROM Write cycle is currently occurring. Only serial commands to the Volatile memory
locations are allowed (addresses 00h, 01h, 04h, and 05h)
0
= An EEPROM Write cycle is NOT currently occurring
Note 1:
Requires a High Voltage command to modify the state of this bit (for Nonvolatile devices only). This bit is
not directly written, but reflects the system state (for this feature).
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