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参数资料
| 型号： | L6238SQT |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 5 A, PQFP64 |
| 封装： | TQFP-64 |
| 文件页数： | 3/31页 |
| 文件大小： | 3465K |
| 代理商： | L6238SQT |
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Bemf. This resychronization can either occur
whenever Output Enable or Run/Brake is first
brought low then high.
Referring to figure 2-4, the "Hold for Resync"
state is brought low. The controller leaves this
state and enters "Start Resync" when Output En-
able is high.
S
Q
TO START-UP
LOGIC
S
OVER TEMP SHUTDOWN
D95IN311
OUTPUT
ENABLE
RUN/
BRAKE
FALIGN
Figure 2.3: Watch-Dog Timer
LOAD MIN DELAY
LOAD MIN MASK***
DELAY COUNT
STATE=STATE+1
MASK COUNT
LOAD DELAY=MIN
LOAD MASK=MIN
PERIOD COUNT
DELAY COUNT*
STATE=STATE+1
MASK COUNT
CHECK FOR Zc
OUTENA=1
BEMF
DRIVERS OFF
MIN CLOCK DELAY
PERIOD STOP
D95IN312
*CLOCK DELAY=(TDLY [2:0] WHEN BEMF PERIOD <3.3ms @ 10MHz (SPEED>12.7Hz FOR 8 POLES)
BEMF: BEMF RISING WITH PNSLOPE=1 OR BEMF FALLING WITH PNSLOPE=0
BEMF: BEMF RISING WITH PNSLOPE=0 OR BEMF FALLING WITH PNSLOPE=1
** MONO=0 WHEN FREQ (BEMF)=2*FREQ(PHASE)
*** MIN MASK=192/SYS_CLK(I.E.WITH SYS_CLK=10MHz, MIN MASK=19.2
s)
BEMF
RUN/BRK=0
BEMF
DRIVERS OFF
DRIVERS ON
LOAD DELAY=PERIOD
LOAD MASK=PERIOD
RESET PERIOD
PERIOD COUNT
DELAYH COUNT*
STATE=STATE+1
MASK COUNT
MONO=0**
BEMF
RUN
MODE
OUTENA=0
OUTENA=1
HOLD FOR RESYNC
RESYNCHRONIZATION MODE
Figure 2-4
STATE=1
DRIVERS OFF
MIN CLOCK DELAY
PERIOD STOP
DELAY STOP
MASK STOP
DRIVERS OFF
MIN CLOCK DELAY
LOAD MIN DELAY
LOAD MIN MASK
PERIOD STOP
DELAY COUNT
STATE=STATE+1
MASK COUNT
CHECK FOR Zc
DRIVERS ON
PERIOD STOP
DELAY STOP
MASK STOP
STATE=STATE+1
LOAD DELAY=MIN
LOAD MASK=MAX
PERIOD COUNT
DELAY COUNT
STATE=STATE+1
MASK COUNT
CHECK FOR Zc
BEMF
221
SYS_CLK
RUN/BRAKE=1
POR=0
FROM ANY STATE
OUTENA=1
64/FALIGN
192/FALIGN
DRIVERS ON
LOAD DELAY=PERIOD
LOAD MASK=PERIOD
RESET PERIOD
PERIOD COUNT
DELAY COUNT*
STATE=STATE+1
MASK COUNT
BEMF
D95IN310
BEMF: BEMF RISING WITH PNSLOPE=1 OR BEMF FALLING WITH PNSLOPE=0
BEMF: BEMF RISING WITH PNSLOPE=0 OR BEMF FALLING WITH PNSLOPE=1
***MIN MASK=192/SYS_CLK (I.E. WITH SYS_CLK=10MHz, MIN MASK=19.2
s)
BEMF
RUN/BRK=0
FROM ANY STATE
Figure 2.2
L6238S
11/31
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