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参数资料
| 型号： | L64724BC |
| 厂商： | LSI CORP |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封装： | PLASTIC, TQFP-80 |
| 文件页数： | 29/32页 |
| 文件大小： | 338K |
| 代理商： | L64724BC |
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6
L64724 Satellite Receiver
As shown in Figure 3, the L64724 has the following major interfaces:
Channel
Channel Clock
Channel Data Output
PLL
ADC
AGC/Clock Control
Microcontroller
Control Signal
The following signal descriptions are listed according to the major
interface groups.
Channel Interface
The Channel Interface is the input path to the L64724 satellite receiver.
The two signals IVIN and QVIN are the I and Q streams from the satellite
tuner circuit. The CLK signal strobes in the data signals.
IBYPASS[5:0] I Channel Data
Input
The IBYPASS[5:0] signals form the Digital Received
I Channel data input bus, which supplies the I Stream to
the L64724 when the ADC is bypassed.
IVIN
I Channel Data
Input
The IVIN signal is the Analog Received I Channel data
input bus, which supplies the I Stream to the L64724.
QBYPASS[5:0]
Q Channel Data
Input
The QBYPASS[5:0] signals form the Digital Received
Q Channel data input bus, which supplies the Q Stream
to the L64724 when the ADC is bypassed.
QVIN
Q Channel Data
Input
The QVIN signal is the Analog Received Q Channel data
input bus, which supplies the Q Stream to the L64724.
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