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参数资料
| 型号： | L6605D |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO20 |
| 封装： | SO-20 |
| 文件页数： | 3/10页 |
| 文件大小： | 2337K |
| 代理商： | L6605D |
DESCRIPTION (continued)
The diagnostic part allows to monitor failures due
to overtemperature or wrong card positioning.
The failures are internally coded and readable in-
side the STATUS REGISTER through the bidirec-
tional pin DATA configurated in output.
The antibouncing circuitry, active during card in-
sertion only, rejects ripetitive switching-on of the
power supply sections.
PIN FUNCTION
Pin
Description
VS
Input Power Supply voltage for VCS regulated output and for device supply.
VCSO
Output regulated voltage for card supply; ICSmax = 80mA; overload protected (81 to 200mA)
VPPIN
Input power supply for VPP regulated voltage
VPPOUT
Programmable output regulated voltage for memory card writing; 8 voltage levels are allowed by
means of 3 bit DAC. IPPmax = 50mA.
VCSEN
(Active Low) VCS supply input enable; Its value is fixed from the
P allowing or not the normal R/W
operations on the card.
SWITCH
Input signal produced by the reader system indicating that a card has been inserted. Internally, an
antibouncing system is provided to avoid multiple switching.
CS
Chip select (active low). CS low level indicates an I/O operation request from
P.
IRQ
Interrupt Request (Active low).
An IRQ low level indicates that a card insertion/extraction or Failure has occured.
PRG
Program (Active low).
PRG low level enables L6605 to deliver in output the VPPO level set by 3 bit DAC.
DATA
I/O pin for data exchange between
P and the device. Through this pin flow 3 bit input DAC or 2 bit
STATUS REGISTER code.
CK
External clock.
CEXT
Pin to connect an external capacitor for antibouncing delay time.
GND
4 pins to ground.
PIN CONNECTIONS (Top view)
Powerdip 12+3+3
SO 12+4+4
THERMAL DATA
Symbol
Parameter
L6605
L6605D
Unit
Rth j-amb
Thermal Resistance Junction to Ambient
60
50 (*)
°C/W
(*) Soldered an a 35
thick 6cm2 P.C. board copper area.
L6605
2/10
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