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参数资料
| 型号： | L6605D |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO20 |
| 封装： | SO-20 |
| 文件页数： | 4/10页 |
| 文件大小： | 2337K |
| 代理商： | L6605D |
CIRCUIT OPERATION
CARD POWER SUPPLY
Regulated voltage to supply the card (5V/80mA).
During nominal condition (VS = 12V, ICS = 80mA)
the VCS range variation is equal to + 3%.
While during line/load variation (VS = 10V to 15V;
ICS = 1mA to 80mA) the VCS range is + 5%.
An internal circuitry checks the ICS level; the pro-
tection block activates an IRQ with the proper fail-
ure code when the output current is in 81mA to
200mA range.
PROGRAMMING POWER SUPPLY
L6605 works in step-down mode by means of the
programmed output voltage VPP. 8VPP levels can
be selected programming the 3 bit DAC as per
Table 1. During nominal conditions (IPP = 50mA;
VPPI = 30V) the VPP range variation is equal to
ELECTRICAL CHARACTERISTICS (VS = 12V; Tj = 25°C)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VS
Supply Voltage
10
12
15
V
VCS
Card Supply Voltage
(Logic Inputs onset)
ICS = 80mA, VS = 12V
ICS = 1mA to 80mA
VS = 10V to 15V
CLOAD min = 5nF; CLOAD max = 20
F
4.85
4.75
5
5.15
5.25
V
ICS
Current Supply Card
80
mA
ICSS
ICS Short Circuit
VS = 12V
81
200
mA
VPPI
VPP Supply Voltage
VPPO +
2.5V
33
V
VPPO
Programming Voltage
IPP = 50mA; VPPI = 30V;
Ton < 5ms
IPP = 1mA to 50mA
VPPI = max. 33V (see note 1)
CLOAD min = 5nF
CLOAD max = 500nF (see note 2)
-2.5%
-5%
VDAC
+2.5%
+5%
V
IPP
Output Program. Current
VPPI = 30V
50
mA
IPPs
IPP Short Circuit
51
150
mA
ton
VPP, Rise Time
CLOAD min = 5nF
CLOAD max = 500nF (see note 2)
IL = 50mA (see note 1)
200
s
toff
VPP, Fall Time
200
s
tshadow
Shadow Timing
Cbounce = 0.1
F
1
ms
VSWLOW
Low Level Switch Input
0.8
V
VSWHIGH
High Level Switch Input
2
Vs-2V
V
tCKON
Clock ON Time
CLOAD = 50pF, ISINK = 4mA,
VL = 0.4V
1
s
tCKOFF
Clock OFF Time
1
s
tD
Delay Time
250
ns
tSET-UP1
1st bit Set-up Time
500
ns
tHOLD1
1st bit Hold Time
500
tCKON
ns
tSET-UP2
Data Set-up Time
500
ns
tHOLD2
Data Hold Time
500
ns
tSCK
Clock Set-up Time
250
ns
tHCK
Clock Hold Time
250
ns
f
Clock Frequency
500
KHz
SR
VPP Slew Rate
From rest state to
programming state and
viceversa
2V/
s
VSTH
Power ON/OFF Threshold
Logic inputs onset
8.5
9.5
V
VSHY
VSTH Hysteresis
0.6
V
TS
Thermal Shutdown
180
°C
TH
Thermal Hysteresis
20
°C
Note 1: True for values in Tab. 1 only. ;
Note 2: Values higher than 500nF are permitted, but the ton, toff timing will be out ISO norm.
L6605
3/10
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