
L6997S
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4
DEVICE DESCRIPTION
4.1 Constant On Time PWM topology
Figure 5. Loop block schematic diagram
The device implements a Constant On Time control scheme, where the Ton is the high side MOSFET on time
duration forced by the one-shot generator. The On Time is directly proportional to VSENSE pin voltage and in-
verse to OSC pin voltage as in Eq1:
(1)
where KOSC = 180ns and τ is the internal propagation delay time (typ. 40ns). The system imposes in steady
state a minimum On Time corresponding to VOSC = 1V. In fact if the VOSC voltage increases above 1V the cor-
responding Ton will not decrease. Connecting the OSC pin to a voltage partition from VIN to GND, it allows a
steady-state switching frequency FSW independent of VIN. It results:
(2)
where
(3)
(4)
The above equations allow setting the frequency divider ratio
αOSC once output voltage has been set; note
that such equations hold only if VOSC<1V. Further the Eq2 shows how the system has a switching frequen-
cy ideally independent from the input voltage. The delay introduces a light dependence from VIN. A mini-
mum Off-Time constraint of about 500ns is introduced in order to assure the boot capacitor charge and to
Q
Vsense
R3
R4
R2
R1
R
S
Vout
Vin
HGATE
LGATE
Q
OSC
FB
Vref
HS
LS
DS
PWM comparator
FFSR
One-shot generator
-
+
T
ON
K
OSC
V
SENSE
V
OSC
----------------------
τ
+
=
f
SW
V
OUT
V
IN
---------------
1
T
ON
-----------
α
OSC
α
OUT
---------------
1
K
OSC
---------------
α
OSC
→
f
SW KOSC αOUT
==
=
α
OSC
V
OSC
V
IN
---------------
R
2
R
2
R
1
+
--------------------
==
α
OUT
V
FB
V
OUT
---------------
R
4
R
3
R
4
+
--------------------
==