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参数资料
| 型号： | LA4032V-75TN44E |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 12/42页 |
| 文件大小： | 0K |
| 描述： | IC CPLD 32MACROCELLS 44TQFP |
| 标准包装： | 160 |
| 系列： | LA-ispMACH |
| 可编程类型： | 系统内可编程 |
| 最大延迟时间 tpd(1)： | 7.5ns |
| 电压电源 - 内部： | 3 V ~ 3.6 V |
| 宏单元数： | 32 |
| 输入/输出数： | 30 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-TQFP |
| 供应商设备封装： | 44-TQFP（10x10） |
| 包装： | 托盘 |
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Lattice Semiconductor
LA-ispMACH 4000V/Z Automotive Family Data Sheet
2
Table 2. LA-ispMACH 4000Z Automotive Family Selection Guide
The LA-ispMACH 4000V/Z automotive family offers densities ranging from 32 to 128 macrocells. There are multiple
density-I/O combinations in Thin Quad Flat Pack (TQFP) packages ranging from 44 to 144 pins. Tables 1 and 2
show the macrocell, package and I/O options, along with other key parameters.
The LA-ispMACH 4000V/Z automotive family has enhanced system integration capabilities. It supports 3.3V (4000V
and 1.8V (4000Z) supply voltages and 3.3V, 2.5V and 1.8V interface voltages. Additionally, inputs can be safely
driven up to 5.5V when an I/O bank is congured for 3.3V operation, making this family 5V tolerant. The LA-
ispMACH 4000V/Z also offers enhanced I/O features such as slew rate control, PCI compatibility, bus-keeper
latches, pull-up resistors, pull-down resistors, open drain outputs and hot socketing. The LA-ispMACH 4000V/Z
automotive family is in-system programmable through the IEEE Standard 1532 interface. IEEE Standard 1149.1
boundary scan testing capability also allows product testing on automated test equipment. The 1532 interface sig-
nals TCK, TMS, TDI and TDO are referenced to VCC (logic core).
Overview
The LA-ispMACH 4000V/Z automotive devices consist of multiple 36-input, 16-macrocell Generic Logic Blocks
(GLBs) interconnected by a Global Routing Pool (GRP). Output Routing Pools (ORPs) connect the GLBs to the I/O
Blocks (IOBs), which contain multiple I/O cells. This architecture is shown in Figure 1.
Figure 1. Functional Block Diagram
LA-ispMACH 4032Z
LA-ispMACH 4064Z
LA-ispMACH 4128Z
Macrocells
32
64
128
I/O + Dedicated Inputs
32+4
32+4/64+10
64+10
tPD (ns)
7.5
tS (ns)
4.5
tCO (ns)
4.5
fMAX (MHz)
168
Supply Voltage (V)
1.8V
Pins/Package
48-pin Lead-Free TQFP
100-pin Lead-Free TQFP
I/O
Block
ORP
16
GOE0
GOE1
V
CC
GND
TCK
TMS
TDI
TDO
36
Generic
Logic
Block
Generic
Logic
Block
I/O
Block
ORP
16
36
Generic
Logic
Block
Generic
Logic
Block
I/O
Block
I/O
Bank
0
I/O
Bank
1
I/O
Block
36
CLK0/I
CLK1/I
CLK2/I
CLK3/I
16
Global
Routing
P
ool
V
CCO0
GND
V
CCO1
GND
16
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LA4032V-75TN48E | 功能描述:CPLD - 复杂可编程逻辑器件 Auto Grade (AEC-Q100 ) ispMACH4032V RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LA4032ZC-75TN100E | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4032ZC-75TN128E | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4032ZC-75TN144E | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
| LA4032ZC-75TN44E | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:3.3V/1.8V In-System Programmable SuperFAST High Density PLDs |
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