![](http://datasheet.mmic.net.cn/70000/LB11820M_datasheet_2303234/LB11820M_3.png)
No. 7104-3/17
LB11820M
Parameter
Symbol
Conditions
Ratings
Unit
min
typ
max
[VCTL Pin]
Input voltage 1
VCTL1
Output duty : 0%
1.05
1.4
1.75
V
Input voltage 2
VCTL2
Output duty : 100%
3.0
3.5
4.1
V
Input bias current 1
IB1(CTL)
VCTL = 0 V
–80
–60
A
Input bias current 2
IB2(CTL)
VCTL = 5 V
60
80
A
[PWM Oscillator (PWM pin)]
High-level output voltage
VOH(PWM)
2.75
3.0
3.25
V
Low-level output voltage
VOL(PWM)
1.0
1.2
1.3
V
External capacitor charge current
ICHG
VPWM = 2.1 V
–60
–45
–30
A
Oscillator frequency
f(PWM)
C = 1000pF
17.6
22
26.8
kHz
Amplitude
V(PWM)
1.6
1.8
2.1
Vp-p
[TOC pin]
Input voltage 1
VTOC1
Output duty : 0%
2.72
3.0
3.30
V
Input voltage 2
VTOC2
Output duty : 100%
0.99
1.2
1.34
V
Input voltage 1L
VTOC1L
Design target value*, when VCC2 = 4.7 V, 0%
2.72
2.80
2.90
V
Input voltage 2L
VTOC2L
Design target value*, when VCC2 = 4.7 V, 100%
0.99
1.08
1.17
V
Input voltage 1H
VTOC1H
Design target value*, when VCC2 = 5.3 V, 0%
3.08
3.20
3.30
V
Input voltage 2H
VTOC2H
Design target value*, when VCC2 = 5.3 V, 100%
1.11
1.22
1.34
V
[HP pin]
Output saturated voltage
VHPL
IO = 7 mA
0.15
0.5
V
Output leakage current
IHP leak
VO = 13.5 V
10
A
[CSD Oscillator (CSD pin)]
High-level output voltage
VOH(CSD)
3.2
3.6
4.0
V
Low-level output voltage
VOL(CSD)
0.9
1.1
1.3
V
External capacitor charge current
ICHG1
–14
–10
–6
A
External capacitor discharge current
ICHG2
7
11
15
A
Oscillator frequency
f(CSD)
C = 0.01 F
200
Hz
Amplitude
V(CSD)
2.2
2.5
2.75
Vp-p
[Current Limiter Circuit (RF pin)]
Limiter voltage
VRF
0.45
0.5
0.55
V
[Low-Voltage Protection Circuit (LVS pin)]
Operating voltage
VSDL
3.6
3.8
4.0
V
Release voltage
VSDH
4.1
4.3
4.5
V
Hysteresis
VSD
0.35
0.5
0.65
V
[Thermal Shutdown Circuit (Thermal protection circuit)]
Thermal shutdown temperature
TSD
Design target value* (Junction temperature)
125
145
165
C
Hysteresis
TSD
Design target value* (Junction temperature)
20
25
30
C
[PWMIN Pin]
Input frequency
f(PI)
50
kHz
High-level input voltage
VIH(PI)
2.0
VREG
V
Low-level input voltage
VIL(PI)
0
1.0
V
Input open voltage
VIO(PI)
VREG – 0.5
VREG
V
Hysteresis
VIS(PI)
0.2
0.3
0.4
V
High-level input current
IIH(PI)
VPWMIN = VREG
–10
0
10
A
Low-level input current
IIL(PI)
VPWMIN = 0 V
–130
–96
A
[S/S Pin]
High-level input voltage
VIH(SS)
2.0
VREG
V
Low-level input voltage
VIL(SS)
0
1.0
V
Input open voltage
VIO(SS)
VREG – 0.5
VREG
V
Hysteresis
VIS(SS)
0.2
0.3
0.4
V
High-level input current
IIH(SS)
VS/S = VREG
–10
0
10
A
Low-level input current
IIL(SS)
VS/S = 0 V
–130
–96
A
* : These are design target values and are not tested.
Continued from preceding page.
Continued on next page.