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| 型号： | LC5384B-5Q208C |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 中文描述： | EE PLD, 6.5 ns, PQFP208 |
| 封装： | PLASTIC, QFP-208 |
| 文件页数： | 56/66页 |
| 文件大小： | 240K |
| 代理商： | LC5384B-5Q208C |
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Lattice Semiconductor
ispMACH 5000B Family Data Sheet
6
each of these signals. The output of the OE MUX goes through a logical AND with the TOE signal to allow easy tri-
stating of the outputs for testing purposes.
The four Shared PTOE signals are derived from PT163 of each GLB. The PTOE signal is derived from the rst
product term in each macrocell cluster, which is directly routed to the OE MUX. Therefore, every I/O cell can have a
different OE signal. Figure 6 is a graphical representation of the I/O cell.
Figure 6. ispMACH 5000B I/O Cell
sysIO Capability
The ispMACH 5000B devices are divided into four sysIO banks, where each bank is capable of supporting 14 dif-
ferent I/O standards. Each sysIO bank has its own I/O supply voltage (VCCO), reference voltage (VREF), and termi-
nation voltage (VTT, as applicable), resources allowing each bank complete independence from the others. Each
I/O within a bank is individually congurable consistent with the VCCO and VREF settings. In addition, each I/O has
individually congurable drive strength, weak pull-up, weak pull-down or a bus-friendly latch. Table 2 lists the
sysIO standards with the typical values for VCCO, VREF and VTT.
The TOE and JTAG pins of the ispMACH 5000B device are the only pins that do not have sysIO capabilities. These
pins support the 2.5V LVTTL and LVCMOS standards.
There are three classes of I/O interface standards implemented in the ispMACH 5000B devices. The rst is the
un-terminated, single-ended interface. It includes the 3.3V LVTTL standard along with the 1.8V, 2.5V and 3.3V
LVCMOS interface standards. Additionally, PCI and AGP-1X are all subsets of this type of interface.
The second type of interface implemented is the terminated, single-ended interface standard. This group of inter-
faces includes different versions of SSTL and HSTL interfaces along with CTT, GTL+ and single-ended LVPECL.
Use of these particular I/O interfaces requires an additional VREF signal. At the system level a termination voltage,
VTT, is also required. Typically an output will be terminated to VTT at the receiving end of the transmission line it is
driving.
The nal type of interfaces implemented are the differential standards LVDS and LVPECL. These interfaces are
implemented on clock pins only. When using one of the differential standards, a pair of global clock pins (GCLK0
and GCLK1 or GCLK2 and GCLK3) are combined to create a single clock signal.
Global PTOE 0
Global PTOE 1
Global PTOE 2
Global PTOE 3
PTOE
GOE0
GOE1
TOE
VCCO to all
other I/Os
in bank
VCC for
whole chip
VREF to all
other I/Os in bank
VREF dependent
Input Buffer
CMOS/TTL
Input Buffer
(VREF independent)
I/O
Pad
GND
Output Buffer
(VCCO independent for
open drain outputs)
Data Output
from Macrocell
Data Input to Routing
Data Input to Macrocell
+
–
Discontinued
Product
(PCN
#02-06).
Contact
Rochester
Electronics
for
Availability.
www.latticesemi.com/sales/discontinueddevicessales.cfm
相关PDF资料 |
PDF描述 |
|---|---|
| LC5512B-10F256I | |
| LC5512B-75Q208I | |
| LC5128B-10T128I | |
| LC5384B-5F256C | |
| LC5512B-75F256I | |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LC5384B-5Q208I | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75F256C | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75F256I | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75Q208C | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75Q208I | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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