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参数资料
| 型号： | LC5384B-5Q208C |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 中文描述： | EE PLD, 6.5 ns, PQFP208 |
| 封装： | PLASTIC, QFP-208 |
| 文件页数： | 66/66页 |
| 文件大小： | 240K |
| 代理商： | LC5384B-5Q208C |
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Lattice Semiconductor
ispMACH 5000B Family Data Sheet
9
that ensures that the port remains compliant to the IEEE 1532 standard. By using IEEE 1532 as the communication
interface through which ISP is achieved, customers get the benet of a standard, well-dened interface.
The ispMACH 5000B devices can be programmed across the commercial temperature and voltage range. The PC-
based Lattice software facilitates in-system programming of ispMACH 5000B devices. The software takes the
JEDEC le output produced by the design implementation software, along with information about the JTAG chain,
and creates a set of vectors that are used to drive the JTAG chain. The software can use these vectors to drive a
JTAG chain via the parallel port of a PC. Alternatively, the software can output les in formats understood by com-
mon automated test equipment. This equipment can then be used to program ispMACH 5000B devices during the
testing of a circuit board.
Security Scheme
A programmable security scheme is provided on the ispMACH 5000B devices as a deterrent to unauthorized copy-
ing of the array conguration patterns. Once programmed, this security prevents readback of the programmed pat-
tern by a device programmer, securing proprietary designs from competitors. The security scheme also prevents
programming and verication. The entire device must be erased in order to reset the security scheme.
Hot Socketing
The ispMACH 5000B devices are well suited for those applications that require hot socketing capability. Hot socket-
ing a device requires that the device, when powered down, can tolerate active signals on the I/Os and inputs with-
out being damaged. Additionally, it requires that the effects of the powered-down device be minimal on active
signals.
Density Migration
The ispMACH 5000B family has been designed to ensure that different density devices in the same package have
the same pin-out. Furthermore, the architecture ensures a high success rate when performing design migration
from lower density parts to higher density parts. In many cases, it is possible to shift a lower utilization design tar-
geted for a high density device to a lower density device. However, the exact details of the nal resource utilization
will impact the likely success in each case.
Discontinued
Product
(PCN
#02-06).
Contact
Rochester
Electronics
for
Availability.
www.latticesemi.com/sales/discontinueddevicessales.cfm
相关PDF资料 |
PDF描述 |
|---|---|
| LC5512B-10F256I | |
| LC5512B-75Q208I | |
| LC5128B-10T128I | |
| LC5384B-5F256C | |
| LC5512B-75F256I | |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LC5384B-5Q208I | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75F256C | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75F256I | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75Q208C | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC5384B-75Q208I | 功能描述:CPLD - 复杂可编程逻辑器件 PROGRAM EXPANDED LOG RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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