Lattice Semiconductor
ispMACH 5000B Family Data Sheet
24
LVCMOS25_8mA_out
tEN, tDIS, tBUF
Output congured as
2.5V & 8mA Buffer
-
0.00
-
0.00
-
0.00
-
0.00
ns
LVCMOS25_12mA_out tEN, tDIS, tBUF
Output congured as
2.5V & 12mA Buffer
-
-0.10
-
-0.10
-
-0.10
-
-0.10
ns
LVCMOS25_16mA_out tEN, tDIS, tBUF
Output congured as
2.5V & 16mA Buffer
-
-0.20
-
-0.20
-
-0.20
-
-0.20
ns
LVCMOS33_4A_out
tEN, tDIS, tBUF
Output congured as
3.3V & 4mA Buffer
-
0.80
-
0.80
-
0.80
-
0.80
ns
LVCMOS33_5mA_out
tEN, tDIS, tBUF
Output congured as
3.3V & 5.33mA Buffer
-
0.20
-
0.20
-
0.20
-
0.20
ns
LVCMOS33_8mA_out
tEN, tDIS, tBUF
Output congured as
3.3V & 8mA Buffer
-
0.00
-
0.00
-
0.00
-
0.00
ns
LVCMOS33_12mA_out tEN, tDIS, tBUF
Output congured as
3.3V & 12mA Buffer
-
-0.10
-
-0.10
-
-0.10
-
-0.10
ns
LVCMOS33_16mA_out tEN, tDIS, tBUF
Output congured as
3.3V & 16mA Buffer
-
-0.10
-
-0.10
-
-0.10
-
-0.10
ns
LVCMOS33_20mA_out tEN, tDIS, tBUF
Output congured as
3.3V & 20mA Buffer
-
-0.20
-
-0.20
-
-0.20
-
-0.20
ns
PCI_out
tEN, tDIS, tBUF
Using PCI standard
-
-0.20
-
-0.20
-
-0.20
-
-0.20
ns
AGP_1X_out
tEN, tDIS, tBUF
Using AGP-1X
standard
-
-0.20
-
-0.20
-
-0.20
-
-0.20
ns
SSTL3_I_out
tEN, tDIS, tBUF
Using SSTL3_I
standard
-
0.50
-
0.50
-
0.50
-
0.50
ns
SSTL3_II_out
tEN, tDIS, tBUF
Using SSTL3_II
standard
-
0.10
-
0.10
-
0.10
-
0.10
ns
SSTL2_I_out
tEN, tDIS, tBUF
Using SSTL2_I
standard
-
0.50
-
0.50
-
0.50
-
0.50
ns
SSTL2_II_out
tEN, tDIS, tBUF
Using SSTL2_II
standard
-
-0.10
-
-0.10
-
-0.10
-
-0.10
ns
CTT33_out
tEN, tDIS, tBUF
Using CCT3.3
standard
-
0.80
-
0.80
-
0.80
-
0.80
ns
CTT_25_out
tEN, tDIS, tBUF
Using CCT2.5
standard
-
0.20
-
0.20
-
0.20
-
0.20
ns
HSTL_I_out
tEN, tDIS, tBUF
Using HSTL_I
standard
-
0.10
-
0.10
-
0.10
-
0.10
ns
HSTL_III_out
tEN, tDIS, tBUF
Using HSTL_III
standard
-
0.40
-
0.40
-
0.40
-
0.40
ns
GTL+_out
tEN, tDIS, tBUF
Using GTL+ standard
-
2.00
-
2.00
-
2.00
-
2.00
ns
tIOI Input Adders
CLK0
tGCLK_IN
-
0.00
-
0.00
-
0.00
-
0.00
ns
CLK1
tGCLK_IN
-
0.20
-
0.20
-
0.20
-
0.20
ns
CLK2
tGCLK_IN
-
0.20
-
0.20
-
0.20
-
0.20
ns
CLK3
tGCLK_IN
-
0.20
-
0.20
-
0.20
-
0.20
ns
ispMACH 5128B Timing Adders (Cont.)
Adder
Type
Base
Parameter
Description
-4
-5
-75
-10
Units
Min. Max. Min. Max. Min. Max. Min. Max.
Note: Open drain timing is the same as corresponding LVCMOS timing.
Timing v.1.0
Discontinued
Product
(PCN
#02-06).
Contact
Rochester
Electronics
for
Availability.
www.latticesemi.com/sales/discontinueddevicessales.cfm