Lattice Semiconductor
ispMACH 5000B Family Data Sheet
32
ispMACH 5512B Timing Adders
Adder
Type
Base
Parameter
Description
-45
-75
-10
-12
Units
Min. Max. Min. Max. Min. Max. Min. Max.
tLP
tROUTE
Low Power Adder
-
1.00
-
1.00
-
1.00
-
1.00
ns
tIOI Input Adders
LVCMOS18_in
tIN, tGCLK_IN,
tRST, tGOE
Using LVCMOS1.8
standard
-
0.30
-
0.30
-
0.30
-
0.30
ns
LVCMOS25_in
tIN, tGCLK_IN,
tRST, tGOE
Using LVCMOS2.5
standard
-
0.00
-
0.00
-
0.00
-
0.00
ns
LVCMOS33_in
tIN, tGCLK_IN,
tRST, tGOE
Using LVCMOS3.3
standard
-
0.20
-
0.20
-
0.20
-
0.20
ns
PCI_in
tIN, tGCLK_IN,
tRST, tGOE
Using PCI standard
-
1.00
-
1.00
-
1.00
-
1.00
ns
AGP_1X_in
tIN, tGCLK_IN,
tRST, tGOE
Using AGP-1X
standard
-
1.00
-
1.00
-
1.00
-
1.00
ns
SSTL3_I_in
tIN, tGCLK_IN,
tRST, tGOE
Using SSTL3_I
standard
-
0.90
-
0.90
-
0.90
-
0.90
ns
SSTL3_II_in
tIN, tGCLK_IN,
tRST, tGOE
Using SSTL3_II
standard
-
0.90
-
0.90
-
0.90
-
0.90
ns
SSTL2_I_in
tIN, tGCLK_IN,
tRST, tGOE
Using SSTL2_I
standard
-
0.90
-
0.90
-
0.90
-
0.90
ns
SSTL2_II_in
tIN, tGCLK_IN,
tRST, tGOE
Using SSTL2_II
standard
-
0.90
-
0.90
-
0.90
-
0.90
ns
CTT33_in
tIN, tGCLK_IN,
tRST, tGOE
Using CTT3.3
standard
-
0.90
-
0.90
-
0.90
-
0.90
ns
CTT25_in
tIN, tGCLK_IN,
tRST, tGOE
Using CTT2.5
standard
-
0.90
-
0.90
-
0.90
-
0.90
ns
HSTL_I_in
tIN, tGCLK_IN,
tRST, tGOE
Using HSTL_I
standard
-
1.00
-
1.00
-
1.00
-
1.00
ns
HSTL_III_in
tIN, tGCLK_IN,
tRST, tGOE
Using HSTL_III
standard
-
1.00
-
1.00
-
1.00
-
1.00
ns
GTL+_in
tIN, tGCLK_IN,
tRST, tGOE
Using GTL+ standard
-
1.00
-
1.00
-
1.00
-
1.00
ns
LVDS_in
tGCLK_IN
Using LVDS standard
-
1.00
-
1.00
-
1.00
-
1.00
ns
LVPECL_D_in
tGCLK_IN
Using LVDS
differential standard
-
1.50
-
1.50
-
1.50
-
1.50
ns
tIOO Output Adders
Slow Slew
tEN, tBUF
Output congured for
slow slew rate
-
1.50
-
1.50
-
1.50
-
1.50
ns
LVCMOS18_4mA_out
tEN, tDIS, tBUF
Output congured as
1.8V & 4mA Buffer
-
0.80
-
0.80
-
0.80
-
0.80
ns
LVCMOS18_5mA_out
tEN, tDIS, tBUF
Output congured as
1.8V & 5.33mA Buffer
-
0.50
-
0.50
-
0.50
-
0.50
ns
LVCMOS18_8mA_out
tEN, tDIS, tBUF
Output congured as
1.8V & 8mA Buffer
-
0.10
-
0.10
-
0.10
-
0.10
ns
LVCMOS18_12mA_out tEN, tDIS, tBUF
Output congured as
1.8V & 12mA Buffer
-
-0.10
-
-0.10
-
-0.10
-
-0.10
ns
LVCMOS25_4mA_out
tEN, tDIS, tBUF
Output congured as
2.5V & 4mA Buffer
-
0.50
-
0.50
-
0.50
-
0.50
ns
LVCMOS25_5mA_out
tEN, tDIS, tBUF
Output congured as
2.5V & 5.33mA Buffer
-
0.20
-
0.20
-
0.20
-
0.20
ns
Note: Open drain timing is the same as corresponding LVCMOS timing.
Timing v.1.1
Discontinued
Product
(PCN
#02-06).
Contact
Rochester
Electronics
for
Availability.
www.latticesemi.com/sales/discontinueddevicessales.cfm