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参数资料
| 型号： | LC72131 |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP22 |
| 封装： | SDIP-22 |
| 文件页数： | 10/23页 |
| 文件大小： | 405K |
| 代理商： | LC72131 |
Unlock Detection Timing
1. Unlock Detection Determination Timing
Unlocked state detection is performed in the reference frequency (fref) period (interval). Therefore, in principle,
unlock determination requires a time longer than the period of the reference frequency. However, immediately after
changing the divisor N (frequency) unlock detection must be performed after waiting at least two periods of the
reference frequency.
Figure 1 Unlocked State Detection Timing
For example, if fref is 1 kHz, i.e., the period is 1 ms, after changing the divisor N, the system must wait at least 2 ms
before checking for the unlocked state.
Figure 2 Circuit Structure
No. 4921-18/23
LC72131, 72131M
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC72131D | 制造商:Panasonic Industrial Company 功能描述:IC |
| LC72131K | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
| LC72131K_12 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
| LC72131KC-Z1 | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Bulk |
| LC72131KM | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
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