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参数资料
| 型号： | LC72131 |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDIP22 |
| 封装： | SDIP-22 |
| 文件页数： | 4/23页 |
| 文件大小： | 405K |
| 代理商： | LC72131 |
Continued from preceding page.
3. DO Output Data (Serial Data Output)
OUT Mode
4. DO Output Data
No. 4921-12/23
LC72131, 72131M
No.
Control block/data
Functions
Related data
IF counter control data
This data must be set 1 in normal mode.
IFS
Though if this value is set to zero, the system enters input sensitivity degradation mode,
(11)
and the sensitivity is reduced to 10 to 30 mVrms.
* See the “IF Counter Operation” item for details.
LSI test data
LSI test data
TEST 0 to TEST3
TEST0
(12)
TEST1
These values must all be set to 0.
TEST2
These test data are set to 0 automatically after the power-on reset.
(13)
DNC
Don’t care. This data must be set to 0.
No.
Control block/data
Functions
Related data
I/O port data
Latched from the pin states of the IO1 and IO2 I/O ports.
I2, I1
These values follow the pin states regardless of the input or output setting.
Bits I2, I1 reflect the data latched into each input port when the device changes to OUT Mode.
I1
← IO1 pin state
High: 1
I2
← IO2 pin state
Low: 0
PLL unlock data
Latched from the state of the unlock detection circuit.
UL
← 0: Unlocked
UL
← 1: Locked or detection stopped mode
IF counter binary data
Latched from the value of the IF counter (20-bit binary counter).
C19 to C0
C19
← MSB of the binary counter
C0
← LSB of the binary counter
(1)
(2)
(3)
IOC1,
IOC2
UL0,
UL1
CTE,
GT0,
GT1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC72131D | 制造商:Panasonic Industrial Company 功能描述:IC |
| LC72131K | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
| LC72131K_12 | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
| LC72131KC-Z1 | 制造商:ON Semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER - Bulk |
| LC72131KM | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:PLL Frequency Synthesizer |
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