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参数资料
| 型号： | LC78648E |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封装： | 14 X 14 MM, QFP-80 |
| 文件页数： | 3/19页 |
| 文件大小： | 486K |
| 代理商： | LC78648E |
No. 7694 -11/19
LC78648E
Pin No.
Pin name
I/O
State during a reset
Function
51
F16MIN
I
—
External clock input for digital filters and D/A converter
52
OUT1
O
L
General-purpose output 1
53
F16MOUT
O
Clock output
16.9344 MHz output
54
ASLRCK
I
—
Left/right clock input (Connect to the 0 V level if unused.)
55
ASDACK
I
—
Anti-shock mode pins
Bit clock input (Connect to the 0 V level if unused.)
56
ASDFIN
I
—
Left/right channel data input (Connect to the 0 V level if unused.)
57
LRSY
O
L
Left/right clock output
58
DATACK
O
L
Digital data output pins
Bit clock output
59
DATA
O
L
Left/right channel data output
60
DVDD
—
Digital system power supply
61
DVSS
—
Digital system ground. This pin must be connected to the 0 V level.
62
CE
I
—
Chip enable signal input
63
CL
I
—
Microcontroller interface
Data transfer clock input
64
DI
I
—
Data input
65
DO
O
(H)
Data output (three-state output)
66
WRQB
O
L
Interrupt signal output
67
RESB
I
—
IC reset input. This pin must be set low once after power is first applied.
68
DRF
O
L
Focus on state detection output
Error flag monitor/subcode
Controlled by commands from the microcontroller.
69
C2F/SBCK
I/O
Input
readout clock input
If unused, this pin must either be set to input mode and
connected to the 0 V level or set to output mode and left open.
General-purpose I/O pin 6.
Controlled by commands from the microcontroller.
70
CONT6/SBCK
I/O
Input
Subcode readout clock input
If unused, this pin must either be set to input mode and
connected to the 0 V level or set to output mode and left open.
71
MONI5
O
L
Internal signal monitor pin 5
72
MONI4
O
L
Internal signal monitor pin 4
73
MONI3
O
L
Internal signal monitor pin 3
74
CONT5
I/O
Input
General-purpose I/O pin 5
Controlled by commands from the microcontroller.
75
CONT4
I/O
Input
General-purpose I/O pin 4
If unused, these pins must either be set to input mode and
connected to the 0 V level or set to output mode and left open.
76
PDO1
O
—
Internal VCO control phase comparator output 1
77
PDO2
O
—
Internal VCO control phase comparator output 2
78
PCKIST
AI
—
For use by the PLL circuit
PDO1/PDO2 current setting resistor connection pin
79
VVSS
——
Internal VCO ground. This pin must be connected to the 0 V level.
80
VVDD
—
Internal VCO power supply
Continued from preceding page.
Note: The same potential must be supplied to all the power supply pins (AVDD1, AVDD2, VVDD, XVDD, DVDD, LVDD, and RVDD).
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