![](http://datasheet.mmic.net.cn/40000/LC82161B-E_datasheet_1645008/LC82161B-E_11.png)
LC82161B-E
No.7775-11/19
ARM7
The ARM7TDMI is a high-speed low-power 32-bit RISC core. It features an internal 8 KB unified cache. It also includes
4 KB of working SRAM.
The bus consists of an AMBA bus, and the following are allocated to the AHB bus: the ARM7 itself, which is the bus
master, a DMA controller, a slave memory controller, the SDRAM controller, the protocol engine, and DSP interface
memory. The following peripheral blocks are allocated to the APB bus: the interrupt controller, timers, the USART circuits,
the SIO circuit, and the GPIO circuit.
The ARM7 CPU can access external flash memory or ROM with a 16-bit or 32-bit bus width, 32-bit width SDRAM, 8-bit
or 16-bit SRAM, flash memory, and I/O devices using the 25-bit address bus and 32-bit data bus of the external memory
interface.
Table 1 shows the CPU memory map. After a reset, the user program is executed starting at location 0x00000000 located in
external memory (CSO). The external memory (CSO) area can be swapped with the internal SRAM area by setting the
remap register to 1.
Table 1 Memory Map
At Reset
After Remapping
Address
Contents
Size
Address
Contents
Size
00000000-00000FFF
Internal SRAM
4 KB
00000000-01FFFFFF
External memory (CSO)
32 MB
00001000-01FFFFFF
(Reserved)
02000000-03FFFFFF
(Reserved)
←
04000000-04000FFF
Memory controller
←
04001000-04001FFF
Interrupt controller
←
04002000-04002FFF
REMAP
←
04003000-04003FFF
(Reserved)
←
04004000-04004FFF
DMA controller
←
04005000-0401FFFF
(Reserved)
←
04020000-04021FFF
Protocol engine/MAC
←
04022000-04023FFF
DSP I/F
←
04024000-0402FFFF
(Reserved)
←
04030000-0403FFFF
DSP debugging I/F
←
04040000-05FFFFFF
(Reserved)
←
06000000-06000FFF
GPIO
←
06001000-06001FFF
Plain timer
←
06002000-06003FFF
(Reserved)
←
06004000-06004FFF
USART1
←
06006000-0601FFFF
(Reserved)
←
06020000-06020FFF
System control
←
06021000-06021FFF
Multifunction timers
←
06022000-06022FFF
SDRAM controller
←
06023000-06023FFF
SIO
←
06024000-06024FFF
USART2
←
06025000-07FFFFFF
(Reserved)
←
08000000-09FFFFFF
External memory (CS0)
32 MB
←
0A000000-0BFFFFFF
External memory (CS1)
32 MB
←
0C000000-0DFFFFFF
External memory (CS2)
32 MB
←
0E000000- 0FFFFFFF
External memory (CS3)
32 MB
←
10000000-13FFFFFF
SDRAM
64 MB
←
14000000-FFFFFFFF
(Reserved)
←