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参数资料
| 型号： | LC876596B |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | QIP-100 |
| 文件页数： | 21/23页 |
| 文件大小： | 682K |
| 代理商： | LC876596B |
LC876596B/80B
No.6717-7/23
Pin Assignment
Pin name
I/O
Function
Option
VSS1
VSS2
-
Power supply (-)
No
VDD1
VDD2
VDD3
VDD4
-
Power supply (+)
No
VP
-
Power supply (-)
No
PORT0
P00 to P07
I/O
8bit input/output port
data direction programmable in nibble units
Use of pull-up resistor can be specified in nibble units
Input for HOLD release
Input for port 0 interrupt
15V withstand at N-channel open drain output
Yes
PORT1
P10 to P17
I/O
8bit input/output port
data direction programmable for each bit
Use of pull-up resistor can be specified for each bit
Other pin functions
P10 SIO0 data output
P11 SIO0 data input/bus input/output
P12 SIO0 clock input/output
P13 SIO1 data output
P14 SIO1 data input/bus input/output
P15 SIO1 clock input/output
P16: Timer 1 PWML output
P17: Timer 1 PWMH output/Buzzer output
Yes
PORT3
P30 to P33
I/O
8bit Input/output port
Data direction can be specified for each bit
Use of pull-up resistor can be specified for each bit
15V withstand at N-channel open drain output
Yes
4bit Input/output port
Data direction can be specified for each bit
Use of pull-up resistor can be specified for each bit
Other functions
P70: INT0 input/HOLD release input/Timer0L capture Input/output for watchdog timer
P71: INT1 input/HOLD release input/Timer0H capture input
P72: INT2 input/HOLD release input/timer 0 event input/Timer0L capture input
P73: INT3 input(noise rejection filter attached input)/timer 0 event input/Timer0H
capture input
AD input port: AN8(P70), AN9(P71)
The following types of interrupt detection are possible:
Rising
Falling
Rising/
falling
H level
L level
INT0
INT1
INT2
INT3
Yes
No
Yes
No
Yes
No
PORT7
P70 to P73
I/O
No
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