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参数资料
型号： LFEC20E-3FN484I
厂商： Lattice Semiconductor Corporation
文件页数： 80/163页
文件大小： 0K
描述： IC FPGA 19.7KLUTS 484FPBGA
标准包装： 60
系列： EC
逻辑元件/单元数： 19700
RAM 位总计： 434176
输入/输出数： 360
电源电压： 1.14 V ~ 1.26 V
安装类型： 表面贴装
工作温度： -40°C ~ 100°C
封装/外壳： 484-BBGA
供应商设备封装： 484-FPBGA（23x23）
2-20
Architecture
LatticeECP/EC Family Data Sheet
IPexpress
The user can access the sysDSP block via the IPexpress configuration tool, included with the ispLEVER design
tool suite. IPexpress has options to configure each DSP module (or group of modules) or through direct HDL
instantiation. Additionally Lattice has partnered Mathworks to support instantiation in the Simulink tool, which is a
Graphical Simulation Environment. Simulink works with ispLEVER and dramatically shortens the DSP design cycle
in Lattice FPGAs.
Optimized DSP Functions
Lattice provides a library of optimized DSP IP functions. Some of the IPs planned for LatticeECP DSP are: Bit Cor-
relators, Fast Fourier Transform, Finite Impulse Response (FIR) Filter, Reed-Solomon Encoder/ Decoder, Turbo
Encoder/Decoders and Convolutional Encoder/Decoder. Please contact Lattice to obtain the latest list of available
DSP IPs.
Resources Available in the LatticeECP Family
Table 2-9 shows the maximum number of multipliers for each member of the LatticeECP family. Table 2-10 shows
the maximum available EBR RAM Blocks in each of the LatticeECP family. EBR blocks, together with Distributed
RAM can be used to store variables locally for the fast DSP operations.
Table 2-9. Number of DSP Blocks in LatticeECP Family
Table 2-10. Embedded SRAM in LatticeECP Family
DSP Performance of the LatticeECP Family
Table 2-11 lists the maximum performance in millions of MAC operations per second (MMAC) for each member of
the LatticeECP family.
Table 2-11. DSP Block Performance of LatticeECP Family
Device
DSP Block
9x9 Multiplier
18x18 Multiplier
36x36 Multiplier
LFECP6
4
32
16
4
LFECP10
5
40
20
5
LFECP15
6
48
24
6
LFECP20
7
56
28
7
LFECP33
8
64
32
8
Device
EBR SRAM Block
Total EBR SRAM
(Kbits)
LFECP6
10
92
LFECP10
30
276
LFECP15
38
350
LFECP20
46
424
LFECP33
54
498
Device
DSP Block
DSP Performance
MMAC
LFECP6
4
3680
LFECP10
5
4600
LFECP15
6
5520
LFECP20
7
6440
LFECP33
8
7360
相关PDF资料
PDF描述
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相关代理商/技术参数
参数描述
LFEC20E-3FN672C 功能描述:FPGA - 现场可编程门阵列 19.7K LUTs Pb-Free RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
LFEC20E-3FN672I 功能描述:FPGA - 现场可编程门阵列 19.7K LUTs 400 IO 1. 2V -3 Spd I RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
LFEC20E-3Q208C 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC20E-3Q208I 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
LFEC20E-3QN208C 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:LatticeECP/EC Family Data Sheet
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