Pin Descriptions and Application Information (Continued)
Pin
No.
Pin Name
Schematic
Description
8
10
Digital Ground
PLL V
CC
The ground pin should be connected to the rest
of the circuit ground by a short but independent
PCB trace to prevent contamination by
extraneous signals. The V
CC pin should be
isolated from the rest of the V
CC line by a ferrite
bead and bypassed to pin 8 with an electrolytic
capacitor and a high frequency ceramic.
9
PLL Filter
Recommended topology and values are shown
to the left. It is recommended that both filter
branches be bypassed to the independent
ground as close to pin 8 as possible. Great care
should be taken to prevent external signals from
coupling into this filter from video, I
2C, etc.
11
SDA
The I
2C compatible data line. A pull-up resistor
of about 2 k
should be connected between this
pin and V
CC. A resistor of at least 100
should
be connected in series with the data line for
additional ESD protection.
12
SCL
The I
2C compatible clock line. A pull-up resistor
of about 2 k
should be connected between this
pin and V
CC. A resistor of at least 100
should
be connected in series with the clock line for
additional ESD protection.
13
14
15
16
DAC 4 Output
DAC 2 Output
DAC 3 Output
DAC 1 Output
DAC outputs for cathode cut-off adjustments and
brightness control. DAC 4 can be set to change
the outputs of the other three DACs, acting as a
brightness control. The DAC values and the
special DAC 4 function are set through the I
2C
compatible bus. A resistor of at least 100
should be connected in series with these outputs
for additional ESD protection.
17
18
Ground
V
CC
Ground pin for the output analog portion of the
LM1247 circuitry, and power supply pin for all
the analog of the LM1247. Note the
recommended charge storage and high
frequency capacitors which should be as close
to pins 17 and 18 as possible.
LM1247
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10