参数资料
型号: LM2574DW-ADJR2G
厂商: ON Semiconductor
文件页数: 9/26页
文件大小: 0K
描述: IC REG BUCK ADJ 0.5A 16SOICW
标准包装: 1,000
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.23 V ~ 37 V
输入电压: 4.75 V ~ 40 V
PWM 型: 电压模式
频率 - 开关: 52kHz
电流 - 输出: 500mA
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-SOIC W
其它名称: LM2574DW-ADJR2G-ND
LM2574DW-ADJR2GOSTR
LM2574, NCV2574
PIN FUNCTION DESCRIPTION
Pin
SO?16W
12
PDIP?8
5
Symbol
V in
Description (Refer to Figure 1)
This pin is the positive input supply for the LM2574 step?down switching regulator. In order to
minimize voltage transients and to supply the switching currents needed by the regulator, a
suitable input bypass capacitor must be present (C in in Figure 1).
14
7
Output
This is the emitter of the internal switch. The saturation voltage V sat of this output switch is
typically 1.0 V. It should be kept in mind that the PCB area connected to this pin should be kept
to a minimum in order to minimize coupling to sensitive circuitry.
4
6
3
2
4
1
Sig Gnd
Pwr Gnd
Feedback
Circuit signal ground pin. See the information about the printed circuit board layout.
Circuit power ground pin. See the information about the printed circuit board layout.
This pin senses regulated output voltage to complete the feedback loop. The signal is divided by
the internal resistor divider network R2, R1 and applied to the non?inverting input of the internal
error amplifier. In the Adjustable version of the LM2574 switching regulator, this pin is the direct
input of the error amplifier and the resistor network R2, R1 is connected externally to allow
programming of the output voltage.
5
3
ON/OFF
It allows the switching regulator circuit to be shut down using logic level signals, thus dropping the
total input supply current to approximately 80 m A. The input threshold voltage is typically 1.5 V.
Applying a voltage above this value (up to +V in ) shuts the regulator off. If the voltage applied to this
pin is lower than 1.5 V or if this pin is left open, the regulator will be in the “on” condition.
DESIGN PROCEDURE
Buck Converter Basics
The LM2574 is a “Buck” or Step?Down Converter which
current loop. This removes the stored energy from the
inductor. The inductor current during this time is:
is the most elementary forward?mode converter. Its basic
schematic can be seen in Figure 17.
The operation of this regulator topology has two distinct
I
L(off)
+
V out – V
L
D
t
off
d + on , where T is the period of switching.
– V out t on
in
I +
d + out
in
time periods. The first one occurs when the series switch is
on, the input voltage is connected to the input of the inductor.
The output of the inductor is the output voltage, and the
rectifier (or catch diode) is reverse biased. During this
period, since there is a constant voltage source connected
across the inductor, the inductor current begins to linearly
ramp upwards, as described by the following equation:
V
L(on) L
During this “on” period, energy is stored within the core
material in the form of magnetic flux. If the inductor is
properly designed, there is sufficient energy stored to carry
the requirements of the load during the “off” period.
This period ends when the power switch is once again
turned on. Regulation of the converter is accomplished by
varying the duty cycle of the power switch. It is possible to
describe the duty cycle as follows:
t
T
For the buck converter with ideal components, the duty
cycle can also be described as:
V
V
Figure 18 shows the buck converter idealized waveforms
of the catch diode voltage and the inductor current.
Power
Switch
L
V on(SW)
Power
Power
Power
V in
D
C out
R Load
Switch
Off
Power
Switch
Off
Switch
On
V D (FWD)
Switch
On
Time
Figure 17. Basic Buck Converter
The next period is the “off” period of the power switch.
When the power switch turns off, the voltage across the
inductor reverses its polarity and is clamped at one diode
I pk
I Load (AV)
voltage drop below ground by the catch diode. Current now
I min
Power
Power
flows through the catch diode thus maintaining the load
Diode
Switch
Diode
Switch
Time
Figure 18. Buck Converter Idealized Waveforms
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