参数资料
型号: LM3495MTCX/NOPB
厂商: National Semiconductor
文件页数: 23/36页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 10A 16TSSOP
标准包装: 1
系列: PowerWise®
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 5.5 V
输入电压: 2.9 V ~ 18 V
PWM 型: 电流模式,混合
频率 - 开关: 200kHz ~ 1.5MHz
电流 - 输出: 10A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 标准包装
供应商设备封装: 16-TSSOP
产品目录页面: 1300 (CN2011-ZH PDF)
配用: LM3495EVAL-ND - BOARD EVALUATION LM3495
其它名称: LM3495MTCXDKR
V IN
+
-
L
R L
+ C O
R C
R O
SNVS410F – FEBRUARY 2006 – REVISED APRIL 2013
V O
R FB2
V RAMP
V C
G M
-
+
C 1
C 2
R 1
+
-
0.6V
R FB1
Figure 36. Power Stage and Error Amp
One popular method for selecting the compensation components is to create Bode plots of gain and phase for
the power stage and error amplifier. Combined, they make the overall bandwidth and phase margin of the
regulator easy to determine. Software tools such as Excel, MathCAD, and Matlab are useful for observing how
changes in compensation or the power stage affect system gain and phase.
The power stage in an emulated peak current mode buck converter consists of the DC gain, A PS , a low
frequency pole, f P , the ESR zero, f Z , and a higher frequency pole, f L , set by the ratio of the sensed current ramp
to the emulated current ramp. The power stage transfer function (also called the Control-to-Output transfer
function) can be written:
1+ Z
( 1 + Z ) ( 1 + Z )
G PS = A PS x
P L
s
Z
s s
(23)
Where the DC gain is defined as:
A PS =
R O
G I x R S
x
1+
1
(R O + R L ) x (m C ± 0.5)
L1 x f SW
where
?
?
R S = R DSON-LO + R SNS
m C = S e / S n
?
G I = 4
(24)
( V 16 + 0.125 ) x f
S e =
S n =
Z Z =
IN
V IN x G I x R S
L1
1
R C x C O
SW
(25)
(26)
(27)
The low frequency pole is:
Z P =
1
R O x C O
+
m C - 0.5
L x C O x f SW
(28)
Copyright ? 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM3495
23
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