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| 型号： | LM89EVAL |
| 厂商： | National Semiconductor |
| 文件页数： | 20/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION LM89 |
| 标准包装： | 1 |
| 传感器类型： | 温度 |
| 传感范围： | 0°C ~ 125°C |
| 接口： | SMBus（2 线/I²C） |
| 灵敏度： | ±1°C |
| 电源电压： | 3 V ~ 3.6 V |
| 嵌入式： | 否 |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | LM89 |
| 相关产品： | LM89CIM-ND - IC TEMP SENSOR DGTL 8-SOIC LM89CIMX-ND - IC TEMP SENSOR DGTL 8-SOIC LM89CIMM-ND - IC TEMP SENSOR DGTL 8-MSOP LM89CIMMX-ND - IC TEMP SENSOR DGTL 8-MSOP |
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SNIS128C – AUGUST 2002 – REVISED MARCH 2013
For RLSLB: Remote HIGH Setpoint Low Byte temperature data. Power up default is 0°C. 1 LSB = 0.125°C.
Two's complement format.
REMOTE TEMPERATURE OFFSET REGISTERS (RTOHB and RTOLB)
Table 11. REMOTE TEMPERATURE OFFSET REGISTERS (RTOHB)(Read/Write Address 11h):
BIT
Value
D7
SIGN
D6
64
D5
32
D4
16
D3
8
D2
4
D1
2
D0
1
For RTOHB: Remote Temperature Offset High Byte. Power up default is LHIGH = RHIGH = 0°C. 1 LSB = 1°C.
Two's complement format.
Table 12. REMOTE TEMPERATURE OFFSET REGISTERS (RTOLB) (Read/Write Address 12h):
BIT
Value
D7
0.5
D6
0.25
D5
0.125
D4
0
D3
0
D2
0
D1
0
D0
0
For RTOLB: Remote Temperature Offset High Byte. Power up default is 0°C. 1 LSB = 0.125°C. Two's
complement format.
The offset value written to these registers will automatically be added to or subtracted from the remote
temperature measurement that will be reported in the Remote Temperature registers.
LOCAL and REMOTE T_CRIT REGISTERS (RCS and LCS)
Table 13. LOCAL and REMOTE T_CRIT REGISTERS (RCS and LCS) (Read/Write Address 20h, 19h):
BIT
Value
D7
SIGN
D6
64
D5
32
D4
16
D3
8
D2
4
D1
2
D0
1
D7–D0: T_CRIT setpoint temperature data. Power up default is Local T_CRIT = 85°C and Remote
T_CRIT=110°C. 1 LSB = 1°C, two's complement format.
T_CRIT HYSTERESIS REGISTER (TH)
Table 14. T_CRIT HYSTERESIS REGISTER (TH) (Read and Write Address 21h):
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
16
8
4
2
1
D7–D0: T_CRIT Hysteresis temperature. Power up default is TH = 10°C. 1 LSB = 1°C, maximum value = 31.
FILTER and ALERT CONFIGURE REGISTER
Table 15. FILTER and ALERT CONFIGURE REGISTER (Read and Write Address BFh):
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0
0
0
0
0
Filter Level
ALERT Configure
D7-D3: is not defined defaults to "0".
D2-D1: input filter setting as defined the table below:
D2
0
0
1
1
D1
0
1
0
1
Filter Level
No Filter
Level 1
Level 1
Level 2
20
Product Folder Links: LM89
Copyright ? 2002–2013, Texas Instruments Incorporated
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