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| 型号： | LM89EVAL |
| 厂商： | National Semiconductor |
| 文件页数： | 7/32页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION LM89 |
| 标准包装： | 1 |
| 传感器类型： | 温度 |
| 传感范围： | 0°C ~ 125°C |
| 接口： | SMBus（2 线/I²C） |
| 灵敏度： | ±1°C |
| 电源电压： | 3 V ~ 3.6 V |
| 嵌入式： | 否 |
| 已供物品： | 板，CD |
| 已用 IC / 零件： | LM89 |
| 相关产品： | LM89CIM-ND - IC TEMP SENSOR DGTL 8-SOIC LM89CIMX-ND - IC TEMP SENSOR DGTL 8-SOIC LM89CIMM-ND - IC TEMP SENSOR DGTL 8-MSOP LM89CIMMX-ND - IC TEMP SENSOR DGTL 8-MSOP |
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SNIS128C – AUGUST 2002 – REVISED MARCH 2013
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V DD =+3.0 Vdc to +3.6 Vdc, C L (load capacitance) on output lines = 80
pF. Boldface limits apply for T A = T J = T MIN to T MAX ; all other limits T A = T J = +25°C, unless otherwise noted.
The switching characteristics of the LM89 fully meet or exceed the published specifications of the SMBus version 2.0. The
following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM89. They adhere
to but are not necessarily the SMBus bus specifications.
Symbol
Parameter
Test Conditions
Typical (1)
Limits (2)
Unit
(Limit)
f SMB
SMBus Clock Frequency
100
10
kHz (max)
kHz (min)
t LOW
SMBus Clock Low Time
from V IN(0) max to V IN(0) max
4.7
μs (min)
25
ms (max)
t HIGH
t R,SMB
t F,SMB
t OF
t TIMEOUT
t SU;DAT
t HD;DAT
SMBus Clock High Time
SMBus Rise Time
SMBus Fall Time
Output Fall Time
SMBData and SMBCLK Time Low for Reset of
Serial Interface (5)
Data In Setup Time to SMBCLK High
Data Out Stable after SMBCLK Low
from V IN(1) min to V IN(1) min
(3)
(4)
C L = 400pF,
I O = 3mA, (4)
1
0.3
4.0
250
25
35
250
300
μs (min)
μs (max)
μs (max)
ns (max)
ms (min)
ms (max)
ns (min)
ns (min)
900
ns (max)
t HD;STA
Start Condition SMBData Low to SMBCLK Low
100
ns (min)
(Start condition hold before the first clock falling
edge)
t SU;STO
Stop Condition SMBCLK High to SMBData Low
100
ns (min)
(Stop Condition Setup)
t SU;STA
SMBus Repeated Start-Condition Setup Time,
0.6
μs (min)
SMBCLK High to SMBData Low
t BUF
SMBus Free Time Between Stop and Start
1.3
μs (min)
Conditions
(1)
(2)
(3)
(4)
(5)
Typical values are at T A = 25°C and represent most likely parametric norm.
Limits are ensured to AOQL (Average Outgoing Quality Level).
The output rise time is measured from (V IN(0) max + 0.15V) to (V IN(1) min ? 0.15V).
The output fall time is measured from (V IN(1) min - 0.15V) to (V IN(1) min + 0.15V).
Holding the SMBData and/or SMBCLK lines Low for a time interval greater than t TIMEOUT will reset the LM89's SMBus state machine,
therefore setting SMBData and SMBCLK pins to a high impedance state.
t LOW
V IH
t R
t F
SMBCLK
V IL
t BUF
t HD;STA
t HD;DAT
t HIGH
t SU;DAT
t SU;STA
t SU;STO
V IH
SMBDAT
V I
L
P
S
Figure 2. SMBus Communication
P
Copyright ? 2002–2013, Texas Instruments Incorporated
Product Folder Links: LM89
7
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