参数资料
型号: LNK501P
厂商: Power Integrations
文件页数: 8/20页
文件大小: 0K
描述: IC SWIT OCP CV/CC HV 8DIP
标准包装: 3,000
系列: LinkSwitch®
输出隔离: 隔离
频率范围: 26kHz ~ 46kHz
输出电压: 700V
功率(瓦特): 4W
工作温度: -40°C ~ 150°C
封装/外壳: 8-DIP(0.300",7.62mm),7 引线
供应商设备封装: DIP-8B
包装: 管件
配用: 596-1001-ND - KIT DESIGN ACCELERATOR ADAPTER
LNK501
3. A secondary output of 5 V with a Schottky recti?er diode.
4. Assumed ef?ciency of 70%.
5. The part is board mounted with SOURCE pins soldered to
suf?cient area of copper to keep the die temperature at or
below 100 ° C.
6. An output cable with a total resistance of 0.2 ? .
In addition to the thermal environment (sealed enclosure,
ventilated, open frame, etc), the maximum power capability
of LinkSwitch in a given application depends on transformer
core size, ef?ciency, primary inductance tolerance, minimum
speci?ed input voltage, input storage capacitance, output voltage,
output diode forward drop, etc., and can be different from the
values shown in Table 1.
In designs not required to meet 300 mW no-load consumption,
the transformer can be designed with higher V OR to extend power
capability as noted in the following section.
Transformer Design
To provide an approximately CV/CC output, the transformer
should be designed to be discontinuous; all the energy stored
in the transformer is transferred to the secondary during the
MOSFET off time. Energy transfer in discontinuous mode is
independent of line voltage.
The peak power point prior to entering constant current operation
is de?ned by the maximum power transferred by the transformer.
The power transferred is given by the expression P = 0.5·L P ·I 2 ·f,
where L P is the primary inductance, I 2 is the primary peak current
squared and f is the switching frequency.
To simplify analysis, the data sheet parameter table speci?es an
I 2 f coef?cient. This is the product of current limit squared and
switching frequency normalized to the feedback parameter I DCT .
This provides a single term that speci?es the variation of the
peak power point in the power supply due to LinkSwitch .
As primary inductance tolerance is part of the expression
that determines the peak output power point (start of the CC
characteristic) this parameter should be well controlled. For
an estimated overall constant current tolerance of ±20% the
primary inductance tolerance should be ±10% or better. This
is achievable using standard low cost, center leg gapping
techniques where the gap size is typically 0.08 mm or larger.
Smaller gap sizes are possible but require non-standard, tighter
ferrite A L tolerances.
Other gapping techniques such as ?lm gapping allow tighter
tolerances (±7% or better) with associated improvements in
the tolerance of the peak power point. Please consult your
transformer vendor for guidance.
Core gaps should be uniform. Uneven core gapping, especially
with small gap sizes, may cause variation in the primary
inductance with ?ux density (partial saturation) and make the
constant current region non-linear. To verify uniform gapping
it is recommended that the primary current wave-shape be
examined while feeding the supply from a DC source. The
gradient is de?ned as di/dt = V/L and should remain constant
throughout the MOSFET on time. Any change in gradient of
the current ramp is an indication of uneven gapping.
Measurements made using a LCR bridge should not be solely
relied upon; typically these instruments only measure at currents
of a few milliamps. This is insuf?cient to generate high enough
?ux densities in the core to show uneven gapping.
For a typical EE13 core using center leg gapping, a 0.08 mm
gap (A LG of 190 nH/t 2 ) allows a primary inductance tolerance of
±10% to be maintained in standard high volume production.
This allows the EE13 to be used in designs up to 2.75 W with
less than 300 mW no-load consumption. If ?lm gapping is
used then this increases to 3 W. Moving to a larger core, EE16
for example, allows a 3 W output with center leg gapping.
The transformer turns ratio should be selected to give a V OR
(output voltage re?ected through secondary to primary turns
ratio) of 40 V to 60 V. In designs not required to meet 300 mW
no-load consumption targets, the transformer can be designed
with higher V OR as long as discontinuous mode operation is
maintained. This increases the output power capability. For
example, a 230 VAC input design using an EE19 transformer
core with V OR >70 V, is capable of delivering up to 5 W typical
output power. Note: the linearity of the CC region of the power
supply output characteristic is in?uenced by V OR . If this is an
important aspect of the application, the output characteristic
should be checked before ?nalizing the design.
Output Characteristic Variation
Both the device tolerance and external circuit govern the overall
tolerance of the LinkSwitch output characteristic. Estimated
peak power point tolerances for a 2.75 W design are ±10% for
voltage and ±20% for current limit for overall variation in high
volume manufacturing. This includes device and transformer
tolerances and line variation. Lower power designs may have
poorer constant current linearity.
As the output load reduces from the peak power point, the
output voltage will tend to rise due to tracking errors compared
to the load terminals. Sources of these errors include the
output cable drop, output diode forward voltage and leakage
inductance, which is the dominant cause. As the load reduces,
the primary operating peak current reduces, together with the
leakage inductance energy, which reduces the peak charging
of the clamp capacitor. With a primary leakage inductance of
50 μ H, the output voltage typically rises 30% over a 100% to
5% load change.
8
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2/05
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