参数资料
型号: LP3907SQ-JIXI
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 稳压器
英文描述: 1.5 A DUAL SWITCHING CONTROLLER, 2100 kHz SWITCHING FREQ-MAX, QCC24
封装: 4 X 4 MM, 0.8 MM HEIGHT, LLP-24
文件页数: 32/44页
文件大小: 3058K
代理商: LP3907SQ-JIXI
30017828
Graph Showing a Typical Variation in Capacitance vs. DC
Bias
As shown in the graph, increasing the DC Bias condition can
result in the capacitance value that falls below the minimum
value given in the recommended capacitor specifications ta-
ble. Note that the graph shows the capacitance out of spec
for the 0402 case size capacitor at higher bias voltages. It is
therefore recommended that the capacitor manufacturers'
specifications for the nominal value capacitor are consulted
for all conditions, as some capacitor sizes (e.g. 0402) may not
be suitable in the actual application.
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a temper-
ature range of 55°C to +125°C, will only vary the capacitance
to within ±15%. The capacitor type X5R has a similar toler-
ance over a reduced temperature range of 55°C to +85°C.
Many large value ceramic capacitors, larger than 1F are
manufactured with Z5U or Y5V temperature characteristics.
Their capacitance can drop by more than 50% as the tem-
perature varies from 25°C to 85°C. Therefore X7R is recom-
mended over Z5U and Y5V in applications where the ambient
temperature will change significantly above or below 25°C.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
0.47F to 4.7F range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum capac-
itor with an ESR value within the stable range, it would have
to be larger in capacitance (which means bigger and more
costly) than a ceramic capacitor with the same ESR value. It
should also be noted that the ESR of a typical tantalum will
increase about 2:1 as the temperature goes from 25°C down
to 40°C, so some guard band must be allowed.
Input Capacitor Selection for SW1 and SW2
A ceramic input capacitor of 10F, 6.3V is sufficient for the
magnetic dc/dc converters. Place the input capacitor as close
as possible to the input of the device. A large value may be
used for improved input voltage filtering. The recommended
capacitor types are X7R or X5R. Y5V type capacitors should
not be used. DC bias characteristics of ceramic capacitors
must be considered when selecting case sizes like 0805 and
0603. The input filter capacitor supplies current to the PFET
switch of the dc/dc converter in the first half of each cycle and
reduces voltage ripple imposed on the input power source. A
ceramic capacitor’s low ESR (Equivalent Series Resistance)
provides the best noise filtering of the input voltage spikes due
to fast current transients. A capacitor with sufficient ripple
current rating should be selected. The Input current ripple can
be calculated as:
The worse case is when V
IN = 2VOUT.
Output Capacitor Selection for SW1, SW2
A 10
μF, 6.3V ceramic capacitor should be used on the output
of the sw1 and sw2 magnetic dc/dc converters. The output
capacitor needs to be mounted as close as possible to the
output of the device. A large value may be used for improved
input voltage filtering. The recommended capacitor types are
X7R or X5R. Y5V type capacitors should not be used. DC bias
characteristics of ceramic capacitors must be considered
when selecting case sizes like 0805 and 0603. DC bias char-
acteristics vary from manufacturer to manufacturer and DC
bias curves should be requested from them and analyzed as
part of the capacitor selection process.
The output filter capacitor of the magnetic dc/dc converter
smooths out current flow from the inductor to the load, helps
maintain a steady output voltage during transient load
changes and reduces output voltage ripple. These capacitors
must be selected with sufficient capacitance and sufficiently
low ESD to perform these functions.
The output voltage ripple is caused by the charging and dis-
charging of the output capacitor and also due to its ESR and
can be calculated as follows:
Voltage peak-to-peak ripple due to ESR can be expressed as
follows:
V
PP–ESR = 2 × IRIPPLE × RESR
Because the V
PP-C and VPP-ESR are out of phase, the rms val-
ue can be used to get an approximate value of the peak-to-
peak ripple:
Note that the output voltage ripple is dependent on the induc-
tor current ripple and the equivalent series resistance of the
output capacitor (R
ESR). The RESR is frequency dependent as
well as temperature dependent. The R
ESR should be calcu-
lated with the applicable switching frequency and ambient
temperature.
www.national.com
38
LP3907
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