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参数资料
| 型号： | LP62S16128CU-70LLI |
| 厂商： | AMIC Technology Corporation |
| 元件分类： | SRAM |
| 英文描述： | 128K X 16 BIT LOW VOLTAGE CMOS SRAM |
| 中文描述： | 128K的× 16位低电压CMOS的SRAM |
| 文件页数： | 2/14页 |
| 文件大小： | 160K |
| 代理商： | LP62S16128CU-70LLI |
LP62S16128B-I Series
(August, 2001, Version 1.0)
10
AMIC Technology, Inc.
Timing Waveforms (continued)
Write Cycle 3
(Byte Enable Controlled)
tWC
tAW
Address
DATA IN
DATA OUT
WE
HB, LB
CE
tWR3
tCW
tBW2
tAS1
tWP
tDW
tDH
tOW
tWHZ4
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP, tBW) of a low CE , WE and ( HB and , or LB ).
3. tWR is measured from the earliest of CE or WE or ( HB and , or LB ) going high to the end of the Write cycle.
4. OE level is high or low.
5. Transition is measured
±500mV from steady state. This parameter is sampled and not 100% tested.
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相关代理商/技术参数 |
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|---|---|
| LP62S16128CU-70LLT | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:128K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S16128CV-55LLI | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:128K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S16128CV-55LLT | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:128K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S16128CV-70LLI | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:128K X 16 BIT LOW VOLTAGE CMOS SRAM |
| LP62S16128CV-70LLT | 制造商:AMICC 制造商全称:AMIC Technology 功能描述:128K X 16 BIT LOW VOLTAGE CMOS SRAM |
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