参数资料
| 型号： | LPC11U12FBD48/201, |
| 厂商： | NXP Semiconductors |
| 文件页数： | 15/72页 |
| 文件大小： | 0K |
| 描述： | IC MCU 32BIT 16K 48LQFP |
| 产品培训模块： | Code Density for LPC11xx |
| 标准包装： | 250 |
| 系列： | LPC11Uxx |
| 核心处理器： | ARM? Cortex?-M0 |
| 芯体尺寸： | 32-位 |
| 速度： | 50MHz |
| 连通性： | I²C，Microwire，智能卡，SPI，SSP，UART/USART，USB |
| 外围设备： | 欠压检测/复位，POR，WDT |
| 输入/输出数： | 40 |
| 程序存储器容量： | 16KB（16K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 6K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.8 V ~ 3.6 V |
| 数据转换器： | A/D 8x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 48-LQFP |
| 包装： | 托盘 |
| 其它名称： | 568-8582 |
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LPC11U1X
All information provided in this document is subject to legal disclaimers.
NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
22 of 72
NXP Semiconductors
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
Four match registers per timer that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four external outputs corresponding to match registers, with the following
capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
The timer and prescaler may be configured to be cleared on a designated capture
event. This feature permits easy pulse-width measurement by clearing the timer on
the leading edge of an input pulse and capturing the timer value on the trailing edge.
7.14 System tick timer
The ARM Cortex-M0 includes a system tick timer (SYSTICK) that is intended to generate
a dedicated SYSTICK exception at a fixed time interval (typically 10 ms).
7.15 Windowed WatchDog Timer (WWDT)
The purpose of the watchdog is to reset the controller if software fails to periodically
service it within a programmable time window.
7.15.1 Features
Internally resets chip if not periodically reloaded during the programmable time-out
period.
Optional windowed operation requires reload to occur between a minimum and
maximum time period, both programmable.
Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect feed sequence causes reset or interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (Tcy(WDCLK) 256 4) to (Tcy(WDCLK) 224 4) in
multiples of Tcy(WDCLK) 4.
The Watchdog Clock (WDCLK) source can be selected from the IRC or the dedicated
watchdog oscillator (WDO). This gives a wide range of potential timing choices of
watchdog operation under different power conditions.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LPC11U12FHN201 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; 6 kB SRAM; USB device; USART |
| LPC11U12FHN33 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Low-cost Cortex-M0 USB solutions with Smart Card interface |
| LPC11U12FHN33.201 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:32-bit ARM Cortex-M0 microcontroller; up to 32 kB flash; 6 kB SRAM; USB device; USART |
| LPC11U12FHN33/201 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT 16K FLASH 33QFN 制造商:NXP Semiconductors 功能描述:MCU, 32BIT, 16K FLASH, 33QFN 制造商:NXP Semiconductors 功能描述:MCU, 32BIT, 16K FLASH, 33QFN; Controller Family/Series:ARM Cortex-M0; Core Size:32bit; No. of I/O's:20; Supply Voltage Min:1.8V; Supply Voltage Max:3.6V; Digital IC Case Style:HVQFN; No. of Pins:33; Program Memory Size:16KB; RAM ;RoHS Compliant: Yes |
| LPC11U12FHN33/201, | 功能描述:ARM微控制器 - MCU 32-bit ARM Cortex-M0 MCU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 处理器系列:STM32F373xx 数据总线宽度:32 bit 最大时钟频率:72 MHz 程序存储器大小:256 KB 数据 RAM 大小:32 KB 片上 ADC:Yes 工作电源电压:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:LQFP-48 安装风格:SMD/SMT |
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