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参数资料
| 型号： | LPC2106FHN48,551 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 8/41页 |
| 文件大小： | 0K |
| 描述： | IC ARM7 MCU FLASH 128K 48-HVQFN |
| 标准包装： | 260 |
| 系列： | LPC2100 |
| 核心处理器： | ARM7 |
| 芯体尺寸： | 16/32-位 |
| 速度： | 60MHz |
| 连通性： | I²C，Microwire，SPI，SSI，SSP，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 32 |
| 程序存储器容量： | 128KB（128K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 64K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 1.65 V ~ 3.6 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 48-VFQFN 裸露焊盘 |
| 包装： | 管件 |
| 配用： | 622-1019-ND - BOARD FOR LPC2106 48-LQFP 622-1008-ND - BOARD FOR LPC9103 10-HVSON 568-1756-ND - BOARD EVAL FOR LPC210X ARM MCU |
| 其它名称： | 568-1324 935274661551 LPC2106FHN48-S |
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LPC2104_2105_2106_7
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 07 — 20 June 2008
16 of 41
NXP Semiconductors
LPC2104/2105/2106
Single-chip 32-bit microcontrollers
6.9 General purpose parallel I/O
Device pins that are not connected to a specic peripheral function are controlled by the
GPIO registers. Pins may be dynamically congured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
6.9.1 Features
Direction control of individual bits.
Separate control of output set and clear.
All I/O default to inputs after reset.
6.9.2 Features added with the Fast GPIO set of registers available on
LPC2104/2105/2106/01 only
Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O
timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All Fast GPIO registers are byte addressable.
Entire port value can be written in one instruction.
Ports are accessible via either the legacy group of registers (GPIOs) or the group of
registers providing accelerated port access (Fast GPIOs).
6.10 UARTs
The LPC2104/2105/2106 each contain two UARTs. One UART provides a full modem
control handshake interface, the other provides only transmit and receive data lines.
6.10.1 Features
16 byte Receive and Transmit FIFOs
Register locations conform to 16C550 industry standard
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B
Built-in baud rate generator
25:24
P0.28
0
GPIO Port 0.28
0
1
TMS
27:26
P0.29
0
GPIO Port 0.29
0
1
TCK
29:28
P0.30
0
GPIO Port 0.30
0
1
TDI
31:30
P0.31
0
GPIO Port 0.31
0
1
TDO
Table 7.
Pin function select register 1 (PINSEL1 - 0xE002 C004) …continued
PINSEL1
Pin name
Value
Function
Value after
reset
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LPC2109 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN |
| LPC2109_11 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN |
| LPC2109FBD01 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN |
| LPC2109FBD64 | 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 64K FLASH LQFP64 制造商:NXP Semiconductors 功能描述:MCU 32BIT ARM7 64K FLASH, LQFP64 |
| LPC2109FBD64/00 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN |
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