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| 型号： | LT1611CS5#TR |
| 厂商： | Linear Technology |
| 文件页数： | 4/12页 |
| 文件大小： | 0K |
| 描述： | IC REG INV ADJ 0.3A SOT23-5 |
| 标准包装： | 2,500 |
| 类型： | 反相 |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | -0.9 V ~ -10 V |
| 输入电压： | 0.9 V ~ 10 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.4MHz |
| 电流 - 输出： | 300mA |
| 同步整流器： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | SOT-23-5 |
LT1611
PI N FU N CTIO N S
+ 4 . 5 ? 10 ? 6 ?
SW(Pin1): SwitchPin. Minimizetraceareaatthispinto
keep EMI down.
GND (Pin 2): Ground. Tie directly to local ground plane.
R 1 =
V OUT ? 1 . 23
1 . 23 ?
R 2 ? ?
NFB (Pin 3): Negative Feedback Pin. Minimize trace area.
Reference voltage is –1.23V. Connect resistive divider tap
here. The suggested value for R2 is 10k. Set R1 and R2
according to:
BLOCK DIAGRA M
SHDN (Pin 4): Shutdown Pin. Tie to 1V or more to enable
device. Ground to shut the device down.
V IN (Pin 5): Input Supply Pin. Must be locally bypassed.
V IN 5
R5
R6
V IN
40k
40k
+
COMPARATOR
1 SW
A1
V OUT
Q1
Q2
x10
R3
30k
–
g m
R C
C C
RAMP
GENERATOR
Σ
A2
R
FF
S
Q
DRIVER
+
A=3
Q3
0.15 ?
C PL
(OPTIONAL)
R1
(EXTERNAL)
NFB
R2
R4
140k
3 NFB
1.4MHz
OSCILLATOR
SHDN
4
SHUTDOWN
–
2 GND
(EXTERNAL)
OPERATIO
Figure 2
1611 BD
The LT1611 combines a current mode, fixed frequency
PWM architecture with a –1.23V reference to directly
regulate negative outputs. Operation can be best under-
stood by referring to the block diagram of Figure 2. Q1 and
Q2 form a bandgap reference core whose loop is closed
around the output of the converter. The driven reference
point is the lower end of resistor R4, which normally sits
at a voltage of –1.23V. As the load current changes, the
NFB pin voltage also changes slightly, driving the output
of g m amplifier A1. Switch current is regulated directly on
a cycle-to-cycle basis by A1’s output. The flip-flop is set at
the beginning of each cycle, turning on the switch. When
the summation of a signal representing switch current and
a ramp generator (introduced to avoid subharmonic oscil-
lations at duty factors greater than 50%) exceeds the V C
signal, comparator A2 changes stage, resetting the flip-
4
flop and turning off the switch. Output voltage decreases
(the magnitude increases) as switch current is increased.
The output, attenuated by external resistor divider R1 and
R2, appears at the NFB pin, closing the overall loop.
Frequency compensation is provided internally by R C and
C C . Transient response can be optimized by the addition of
a phase lead capacitor, C PL , in parallel with R1 in applica-
tions where large value or low ESR output capacitors are
used.
As load current is decreased, the switch turns on for a
shorter period each cycle. If the load current is further
decreased, the converter will skip cycles to maintain
output voltage regulation.
The LT1611 can work in either of two topologies. The
simpler topology appends a capacitive level shift to a
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| LT1612EMS8 | 功能描述:IC REG BUCK SYNC ADJ 0.5A 8MSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:升压（升压） 输出类型:可调式 输出数:1 输出电压:1.24 V ~ 30 V 输入电压:1.5 V ~ 12 V PWM 型:电流模式，混合 频率 - 开关:600kHz 电流 - 输出:500mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 包装:带卷 (TR) 供应商设备封装:8-SOIC |
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