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参数资料
| 型号： | LT1720CMS8 |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 运动控制电子 |
| 英文描述： | Dual/Quad, 4.5ns, Single Supply 3V/5V Comparators with Rail-to-Rail Outputs |
| 中文描述： | DUAL COMPARATOR, 4500 uV OFFSET-MAX, 7 ns RESPONSE TIME, PDSO8 |
| 封装： | PLASTIC, MSOP-8 |
| 文件页数： | 7/28页 |
| 文件大小： | 317K |
| 代理商： | LT1720CMS8 |
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7
LT1720/LT1721
Input Voltage Considerations
The LT1720/LT1721 are specified for a common mode
range of –100mV to 3.8V when used with a single 5V
supply. In general the common mode range is 100mV
below ground to 1.2V below V
CC
. The criterion for this
common mode limit is that the output still responds
correctly to a small differential input signal. Also, if one
input is within the common mode limit, the other input
signal can go outside the common mode limits, up to the
absolute maximum limits (a diode drop past either rail at
10mA input current) and the output will retain the correct
polarity.
When either input signal falls below the negative common
mode limit, the internal PN diode formed with the sub-
strate can turn on, resulting in significant current flow
through the die. An external Schottky clamp diode
between the input and the negative rail can speed up
recovery from negative overdrive by preventing the sub-
strate diode from turning on.
When both input signals are below the negative common
mode limit, phase reversal protection circuitry prevents
false output inversion to at least –400mV common mode.
However, the offset and hysteresis in this mode will
increase dramatically, to as much as 15mV each. The input
bias currents will also increase.
When both input signals are above the positive common
mode limit, the input stage will become debiased and the
output polarity will be random. However, the internal
hysteresis will hold the output to a valid logic level, and
because the biasing of each comparator is completely
independent, there will be no impact on any other com-
parator. When at least one of the inputs returns to within
the common mode limits, recovery from this state will take
as long as 1
μ
s.
The propagation delay does not increase significantly
when driven with large differential voltages. However, with
low levels of overdrive, an apparent increase may be seen
with large source resistances due to an RC delay caused
by the 2pF typical input capacitance.
Input Protection
The input stage is protected against damage from large
differential signals, up to and beyond a differential voltage
equal to the supply voltage, limited only by the absolute
maximum currents noted. External input protection cir-
cuitry is only needed if currents would otherwise exceed
these absolute maximums. The internal catch diodes can
conduct current up to these rated maximums without
latchup, even when the supply voltage is at the absolute
maximum rating.
The LT1720/LT1721 input stage has general purpose
internal ESD protection for the human body model. For use
as a line receiver, additional external protection may be
required. As with most integrated circuits, the level of
immunity to ESD is much greater when residing on a
printed circuit board where the power supply decoupling
capacitance will limit the voltage rise caused by an ESD
pulse.
Input Bias Current
Input bias current is measured with both inputs held at 1V.
As with any PNP differential input stage, the LT1720/
LT1721 bias current flows out of the device. With a
differential input voltage of even just 100mV or so, there
will be zero bias current into the higher of the two inputs,
while the current flowing out of the lower input will be
twice the measured bias current. With more than two
diode drops of differential input voltage, the LT1720/
LT1721’s input protection circuitry activates, and current
out of the lower input will increase an additional 30% and
there will be a small bias current into the higher of the two
input pins, of 4
μ
A or less. See the Typical Performance
curve “Input Current vs Differential Input Voltage.”
High Speed Design Considerations
Application of high speed comparators is often plagued
by oscillations. The LT1720/LT1721 have 4mV of internal
hysteresis, which will prevent oscillations as long as
parasitic output to input feedback is kept below 4mV.
APPLICATIO
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相关PDF资料 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT1720CMS8#PBF | 功能描述:IC COMP R-RINOUT DUAL 8-MSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 标准包装:1 系列:- 类型:通用 元件数:1 输出类型:CMOS，开路集电极，TTL 电压 - 电源，单路/双路(±):2.7 V ~ 5.5 V 电压 - 输入偏移（最小值）:7mV @ 5V 电流 - 输入偏压（最小值）:0.25µA @ 5V 电流 - 输出（标准）:84mA @ 5V 电流 - 静态（最大值）:120µA CMRR, PSRR（标准）:- 传输延迟（最大）:600ns 磁滞:- 工作温度:-40°C ~ 85°C 封装/外壳:SC-74A，SOT-753 安装类型:表面贴装 包装:剪切带 (CT) 产品目录页面:1268 (CN2011-ZH PDF) 其它名称:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| LT1720CMS8#PBF | 制造商:Linear Technology 功能描述:IC,VOLT COMPARATOR,DUAL,BIPOLAR,TSSOP,8P |
| LT1720CMS8#TR | 功能描述:IC COMP DUAL R-R 4MA 4.5NS 8MSOP RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1720CMS8#TRPBF | 功能描述:IC COMP R-RINOUT DUAL 8-MSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1720CS8 | 功能描述:IC COMP R-RINOUT DUAL 8-SOIC RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
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