参数资料
型号: LT1952IGN#TRPBF
厂商: Linear Technology
文件页数: 12/28页
文件大小: 0K
描述: IC REG CTRLR ISO PWM CM 16-SSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 560kHz
占空比: 90%
电源电压: 9.25 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
LT1952/LT1952-1
OPERATION
catastrophic damage. Many converters solve this problem
by limiting the operational duty cycle of the MOSFET to
50% or less —or by using a fixed (non-adaptive) maximum
duty cycle clamp with very large voltage rated MOSFETs.
The LT1952/LT1952-1 provide a volt-second clamp to
allow MOSFET duty cycles well above 50%. This gives
greater power utilization for the MOSFET, rectifiers and
transformer resulting in less space for a given power
output. In addition, the volt-second clamp allows a reduced
voltage rating on the MOSFET resulting in lower RDS ON
for greater efficiency. The volt-second clamp defines a
maximum duty cycle ‘guard rail’ which falls when system
input voltage increases.
The LT1952/LT1952-1 SD_V SEC and SS_MAXDC pins
provide a capacitorless, programmable volt-second clamp
solution. Some controllers with volt-second clamps control
switch maximum duty cycle by using an external capacitor
to program maximum switch ON time. Such techniques
have a volt-second clamp inaccuracy directly related to
the error of the external capacitor/pin capacitance and the
error/drift of the internal oscillator. The LT1952/LT1952-
1 use simple resistor ratios to implement a volt-second
clamp without the need for an accurate external capacitor
and with an order of magnitude less dependency on
oscillator error.
An increase of voltage at the SD_V SEC pin causes the
maximum duty cycle clamp to decrease. If SD_V SEC is
resistively divided down from transformer input voltage,
a volt-second clamp is realised. To adjust the initial
maximum duty cycle clamp, the SS_MAXDC pin voltage
is programmed by a resistor divider from the 2.5V V REF
pin to ground. An increase of programmed voltage on
SS_MAXDC pin provides an increase of switch maximum
duty cycle clamp.
Soft-Start
The LT1952/LT1952-1 provide true PWM soft-start by
using the SS_MAXDC pin to control soft-start timing. The
proportional relationship between SS_MAXDC voltage and
switch maximum duty cycle clamp allows the SS_MAXDC
pin to slowly ramp output voltage by ramping the maximum
switch duty cycle clamp —until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
A soft-start event is triggered whenever V IN is too low,
SD_V SEC is too low (UVLO), or a 107mV overcurrent
threshold at OC pin is exceeded. Whenever a soft-start
event is triggered, switching at SOUT and OUT is stopped
immediately.
The SS_MAXDC pin is discharged and only released for
charging when it has fallen below it’s reset threshold
of 0.45V and all faults have been removed. Increasing
voltage on the SS_MAXDC pin above 0.8V will increase
switch maximum duty cycle. A capacitor to ground on
the SS_MAXDC pin in combination with a resistor divider
from V REF , defines the soft-start timing.
Current Mode Topology (I SENSE Pin)
The LT1952/LT1952-1 current mode topology eases fre-
quency compensation requirements because the output
inductor does not contribute to phase delay in the regulator
loop. This current mode technique means that the error
amplifier (nonisolated applications) or the optocoupler
(isolated applications) commands current (rather than
voltage) to be delivered to the output. This makes frequency
compensation easier and provides faster loop response
to output load transients.
A resistor divider from the application’s output voltage
generates a voltage at the inverting FB input of the LT1952/
LT1952-1 error amplifier (or to the input of an external
optocoupler) and is compared to an accurate reference
(1.23V for LT1952/LT1952-1). The error amplifier output
(COMP) defines the input threshold (I SENSE ) of the current
sense comparator. COMP voltages between 0.8V (active
threshold) and 2.5V define a maximum I SENSE threshold
from 0mV to 220mV. By connecting I SENSE to a sense
resistor in series with the source of an external power
MOSFET, the MOSFET peak current trip point (turn off)
can be controlled by COMP level and hence by the output
voltage. An increase in output load current causing the
output voltage to fall, will cause COMP to rise, increasing
I SENSE threshold, increasing the current delivered to the
output. For isolated applications, the error amplifier COMP
output can be disabled to allow the optocoupler to take
control. Setting FB = V REF disables the error amplifier COMP
output, reducing pin current to (COMP – 0.7)/40k.
19521fe
12
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LT1952MPGN#PBF 功能描述:IC REG CTRLR ISO PWM CM 16-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX
LT1952MPGN#TRPBF 功能描述:IC REG CTRLR ISO PWM CM 16-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX
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