参数资料
型号: LT3071EUFD#PBF
厂商: Linear Technology
文件页数: 18/28页
文件大小: 0K
描述: IC REG LDO ADJ 5A 28QFN
产品培训模块: LT3071- LDO Regulator for High Performance Digital ICs
标准包装: 73
稳压器拓扑结构: 正,可调式
输出电压: 0.8 V ~ 1.8 V
输入电压: 0.95 V ~ 3 V
电压 - 压降(标准): 0.085V @ 5A
稳压器数量: 1
电流 - 输出: 5A
电流 - 限制(最小): 5.1A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-QFN(4x5)
包装: 管件
LT3071
APPLICATIONS INFORMATION
Typical 0603 or 0805 case-size capacitors have an ESL of
~800pH and PCB mounting can contribute up to ~200pH.
Thus, it becomes necessary to reduce the parasitic in-
ductance by using a parallel capacitor combination. A
suitable methodology must control this paralleling as
capacitors with the same self-resonant frequency, f R , will
form a tank circuit that can induce ringing of their own
accord. Small amounts of ESR (5mΩ to 20mΩ) have some
benefit in dampening the resonant loop, but higher ESRs
degrade the capacitor response to transient load steps
with rise/fall times less than 1μs. The most area efficient
parallel capacitor combination is a graduated 4/2/1 scale
of f R of the same case size. Under these conditions, the
individual ESLs are relatively uniform, and the resonance
peaks are deconstructively spread beyond the regulator
bandwidth. The recommended parallel combination that
approximates 15μF is 10μF + 4.7μF + 2.2μF. Capacitors
with case sizes larger than 0805 have higher ESL and
lower ESR (<5mΩ). Therefore, more capacitors with
smaller values (<10μF) must be chosen. Users should
consider new generation, low inductance capacitors to
push out f R and maximize stability. Refer to the surface
mount ceramic capacitor manufacturer’s data sheets for
capacitor specifications. Figure 3 illustrates an optimum
PCB layout for the parallel output capacitor combination,
but also illustrates the GND connection between the IN
capacitor and the OUT capacitors to minimize the AC
GND loop for fast load transients. This tight bypassing
connection minimizes EMI and optimizes bypassing.
LT3071
Many of the applications in which the LT3071 excels,
such as FPGA, ASIC processor or DSP supplies, typically
require a high frequency decoupling capacitor network for
the device being powered. This network generally consists
of many low value ceramic capacitors in parallel. In some
applications, this total value of capacitance may be close
to the LT3071’s minimum 15μF capacitance requirement.
This may reduce the required value of capacitance directly
at the LT3071’s output. Multiple low value capacitors in
parallel present a favorable frequency characteristic that
pushes many of the parasitic poles/zeroes beyond the
LT3071’s unity-gain crossover frequency. This technique
illustrates the method that extracts the full bandwidth
performance of the LT3071.
Give additional consideration to the use of ceramic capaci-
tors. Ceramic capacitors are manufactured with a variety of
dielectrics, each with different behavior across temperature
and applied voltage. The most common dielectrics used
are specified with EIA temperature characteristic codes
of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics
are good for providing high capacitances in a small pack-
age, but they tend to have strong voltage and temperature
coefficients as shown in Figures 4 and 5. When used with
a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an
effective value as low as 1μF to 2μF for the DC bias voltage
applied and over the operating temperature range. The X5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
Low-Z
INPUT
47μF
SENSE
IN OUT
GND
2.2μF
4.7μF
LOAD PLANE
10μF
3071 F03
Figure 3. Example PCB Layout
3071fb
18
For more information www.linear.com/3071
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LT3071IUFD#PBF 功能描述:IC REG LDO ADJ 5A 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:3,000 系列:- 稳压器拓扑结构:正,固定式 输出电压:2.5V 输入电压:2.5 V ~ 5.5 V 电压 - 压降(标准):- 稳压器数量:1 电流 - 输出:300mA(最小值) 电流 - 限制(最小):360mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型,TSOT-23-5 供应商设备封装:TSOT-23-5 包装:带卷 (TR)
LT3071IUFD#TRPBF 功能描述:IC REG LDO ADJ 5A 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:3,000 系列:- 稳压器拓扑结构:正,固定式 输出电压:2.5V 输入电压:2.5 V ~ 5.5 V 电压 - 压降(标准):- 稳压器数量:1 电流 - 输出:300mA(最小值) 电流 - 限制(最小):360mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型,TSOT-23-5 供应商设备封装:TSOT-23-5 包装:带卷 (TR)