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| 型号： | LT3071EUFD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 20/28页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 5A 28QFN |
| 产品培训模块： | LT3071- LDO Regulator for High Performance Digital ICs |
| 标准包装： | 73 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.8 V ~ 1.8 V |
| 输入电压： | 0.95 V ~ 3 V |
| 电压 - 压降（标准）： | 0.085V @ 5A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 5A |
| 电流 - 限制（最小）： | 5.1A |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN（4x5） |
| 包装： | 管件 |
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LT3071
APPLICATIONS INFORMATION
wires. The most effective way to reduce overall inductance
is to place the forward and return-current conductors (the
wire for the input and the wire for the return ground) in
very close proximity. Two 18-AWG wires separated by
0.05 inch reduce the overall self inductance to about one-
fourth of a single isolated wire. If the LT3071 is powered
by a battery mounted in close proximity with ground and
power planes on the same circuit board, a 47μF input
capacitor is sufficient for stability. However, if the LT3071
is powered by a distant supply, use a low ESR, large value
input capacitor on the order of 330μF. As power supply
output impedance varies, the minimum input capacitance
needed for application stability also varies.
Bias Pin Capacitance Requirements
The BIAS pin supplies current to most of the internal
control circuitry and the output stage driving the pass
transistor. The LT3071 requires a minimum 2.2μF
bypass capacitor for stability and proper operation. To
ensure proper operation, the BIAS voltage must sat-
isfy the following conditions: 2.2V ≤ V BIAS ≤ 3.6V and
V BIAS ≥ (1.25 ? V OUT + 1V). For V OUT ≤ 0.95V, the
minimum BIAS voltage is limited to 2.2V.
Load Regulation
The LT3071 provides a Kelvin sense pin for V OUT , allowing
the application to correct for parasitic package and PCB
I-R drops. However, LTC recommends that the SENSE pin
terminate in close proximity to the LT3071’s OUT pins.
This minimizes parasitic inductance and optimizes regula-
tion. The LT3071 handles moderate levels of output line
impedance, but excessive impedance between V OUT and
C OUT causes excessive phase shift in the feedback loop
and adversely affects stability.
Figure 1 in the Pin Functions section illustrates the Kelvin-
sense connection method that eliminates voltage drops
due to PCB trace resistance. However, note that the voltage
drop across the external PCB traces adds to the dropout
voltage of the regulator. The SENSE pin input bias current
depends on the selected output voltage. SENSE pin input
current varies from 50μA typically at V OUT = 0.8V to 300μA
typically at V OUT = 1.8V.
Short-Circuit and Overload Recovery
Like many IC power regulators, the LT3071 has safe op-
erating area (SOA) protection. The safe area protection
decreases current limit as input-to-output voltage increases
and keeps the power transistor inside a safe operating
region for all values of input-to-output voltage up to the
absolute maximum voltage rating. V BIAS must be above
the UVLO threshold for any function. The LT3071 has a
precision current limit specified at ±20% that is active if
V BIAS is above UVLO.
Under conditions of maximum I LOAD and maximum
V IN -V OUT the device’s power dissipation peaks at about
3W. If ambient temperature is high enough, die junction
temperature will exceed the 125°C maximum operating
temperature. If this occurs, the LT3071 relies on two
additional thermal safety features. At about 145°C, the
PWRGD output pulls low providing an early warning of an
impending thermal shutdown condition. At 165°C typically,
the LT3071’s thermal shutdown engages and the output is
shut down until the IC temperature falls below the thermal
hysteresis limit. The SOA protection decreases current limit
as the IN-to-OUT voltage increases and keeps the power
dissipation at safe levels for all values of input-to-output
voltage. The LT3071 provides some output current at all
values of input-to-output voltage up to the absolute maxi-
mum voltage rating. See the Current Limit vs V IN curve in
the Typical Performance Characteristics.
During start-up, after the BIAS voltage has cleared its UVLO
threshold and V IN is increasing, output voltage increases
at the rate of current limit charging C OUT .
With a high input voltage, a problem can occur where the
removal of an output short will not allow the output voltage
to recover. Other regulators with current limit foldback
also exhibit this phenomenon, so it is not unique to the
LT3071. The load line for such a load may intersect the
output current curve at two points: normal operation and
the SOA restricted load current settings. A common situ-
ation is immediately after the removal of a short circuit,
but with a static load ≥ 1A. In this situation, removal of the
load or reduction of I OUT to <1A will clear this condition
and allow V OUT to return to normal regulation.
3071fb
20
For more information www.linear.com/3071
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3071EUFD-TR | 制造商:LINER 制造商全称:Linear Technology 功能描述:5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining |
| LT3071EUFD-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining |
| LT3071IUFD | 制造商:LINER 制造商全称:Linear Technology 功能描述:5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining |
| LT3071IUFD#PBF | 功能描述:IC REG LDO ADJ 5A 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:3,000 系列:- 稳压器拓扑结构:正，固定式 输出电压:2.5V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:300mA（最小值） 电流 - 限制（最小）:360mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 供应商设备封装:TSOT-23-5 包装:带卷 (TR) |
| LT3071IUFD#TRPBF | 功能描述:IC REG LDO ADJ 5A 28QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:3,000 系列:- 稳压器拓扑结构:正，固定式 输出电压:2.5V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:- 稳压器数量:1 电流 - 输出:300mA（最小值） 电流 - 限制（最小）:360mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 供应商设备封装:TSOT-23-5 包装:带卷 (TR) |
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