参数资料
型号: LT3071EUFD#TRPBF
厂商: Linear Technology
文件页数: 4/28页
文件大小: 0K
描述: IC REG LDO ADJ 5A 28QFN
标准包装: 2,500
稳压器拓扑结构: 正,可调式
输出电压: 0.8 V ~ 1.8 V
输入电压: 0.95 V ~ 3 V
电压 - 压降(标准): 0.085V @ 5A
稳压器数量: 1
电流 - 输出: 5A
电流 - 限制(最小): 5.1A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-QFN(4x5)
包装: 带卷 (TR)
LT3071
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T A = 25°C. C OUT = 15μF (Note 9), V IN = V OUT + 0.3V (Note 5), V BIAS = 2.5V unless
otherwise noted.
PARAMETER
V IZ Input Range (Logic-Z State),
V O2 , V O1 , V O0
V IH Input Threshold (Logic-1 State),
V O2 , V O1 , V O0
CONDITIONS
Input Rising
l
l
MIN
0.75
V BIAS – 0.25
TYP
MAX
V BIAS – 0.9
UNITS
V
V
Input Hysteresis (Both Thresholds),
V O2 , V O1 , V O0
60
mV
0.9
Input Current High,
V O2 , V O1 , V O0
Input Current Low,
V O2 , V O1 , V O0
EN Pin Threshold
V IH = V BIAS = 2.5V, Current Flows Into Pin
V IL = 0V, V BIAS = 2.5V, Current Flows Out of Pin
V OUT = Off to On, V BIAS = 2.5V
V OUT = On to Off, V BIAS = 2.5V
V OUT = Off to On, V BIAS = 2.2V to 3.6V
V OUT = On to Off, V BIAS = 2.2V to 3.6V
l
l
l
l
l
l 0.36 ? V BIAS
25
25
40
40
1.4
0.56 ? V BIAS
μA
μA
V
V
V
V
EN Pin Logic High Current
EN Pin Logic Low Current
V EN = V BIAS = 2.5V
V EN = 0V
l
l
2.5
4.0
6.5
0.1
μA
μA
V BIAS Ripple Rejection
V IN Ripple Rejection
(Notes 3, 4, 5)
Reference Voltage Noise
(REF/BYP Pin)
Output Voltage Noise
V BIAS = V OUT + 1.5V AVG , V RIPPLE =0.5V P-P , f RIPPLE = 120Hz,
V IN – V OUT = 300mV, I OUT = 2.5A
V BIAS = 2.5V, V RIPPLE = 50mV P-P , f RIPPLE = 120Hz,
V IN – V OUT = 300mV, I OUT = 2.5A
C REF/BYP = 10nF, BW = 10Hz to 100kHz
V OUT = 1V, I OUT = 5A, C REF/BYP = 10nF, C OUT = 15μF,
BW = 10Hz to 100kHz
75
66
10
25
dB
dB
μV RMS
μV RMS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3071 regulators are tested and specified under pulse load
conditions such that T J ? T A . The LT3071E is 100% tested at T A = 25°C.
Performance at –40°C and 125°C is assured by design, characterization
and correlation with statistical process controls. The LT3071I is
guaranteed over the –40°C to 125°C operating junction temperature range.
The LT3071MP is 100% tested and guaranteed over the –55°C to 125°C
operating junction temperature range.
Note 3: To maintain proper performance and regulation, the BIAS supply
voltage must be higher than the IN supply voltage. For a given V OUT , the
BIAS voltage must satisfy the following conditions: 2.2V ≤ V BIAS ≤ 3.6V
and V BIAS ≥ (1.25 ? V OUT + 1V). For V OUT ≤ 0.95V, the minimum BIAS
voltage is limited to 2.2V.
Note 4: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification does not apply
for all possible combinations of input voltage and output current. When
operating at maximum output current, limit the input voltage range to
V IN < V OUT + 500mV.
Note 5: The LT3071 incorporates safe operating area protection circuitry.
Current limit decreases as the V IN -V OUT voltage increases. Current limit
foldback starts at V IN – V OUT > 500mV. See the Typical Performance
Characteristics for a graph of Current Limit vs V IN – V OUT voltage. The
current limit foldback feature is independent of the thermal shutdown
circuity.
Note 6: Dropout voltage, V DO , is the minimum input to output voltage
differential at a specified output current. In dropout, the output voltage
equals V IN – V DO .
Note 7: GND pin current is tested with V IN = V OUT(NOMINAL) + 300mV and a
current source load. VIOC is a buffered output determined by the value of
V OUT as programmed by the V O2 -V O0 pins. VIOC’s output is independent
of the margining function.
Note 8: Reverse output current is tested with the IN pins grounded and the
OUT + SENSE pins forced to the rated output voltage. This is measured as
current into the OUT + SENSE pins.
Note 9: Frequency Compensation: The LT3071 must be frequency
compensated at its OUT pins with a minimum C OUT of 15μF configured
as a cluster of (15×) 1μF ceramic capacitors or as a graduated cluster
of 10μF/4.7μF/2.2μF ceramic capacitors of the same case size. Linear
Technology only recommends X5R or X7R dielectric capacitors.
3071fb
4
For more information www.linear.com/3071
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