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参数资料
| 型号： | LT3430EFE-1 |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 6.5 A SWITCHING REGULATOR, 120 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | 4.40 MM, PLASTIC, TSSOP-16 |
| 文件页数： | 14/28页 |
| 文件大小： | 321K |
| 代理商： | LT3430EFE-1 |
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LT3430/LT3430-1
21
34301fa
ings = 0.233W 45°C/W = 11°C. The 7V zener should be
sized for excess of 0.233W operaton. The tolerances of
the zener should be considered to ensure minimum VC2
exceeds 3.3V + VDROOP.
Input Voltage vs Operating Frequency Considerations
The absolute maximum input supply voltage for the LT3430/
LT3430-1 is specied at 60V. This is based solely on internal
semiconductor junction breakdown effects. Due to internal
power dissipation, the actual maximum VIN achievable in
a particular application may be less than this.
A detailed theoretical basis for estimating internal power
loss is given in the section, Thermal Considerations. Note
that AC switching loss is proportional to both operating
frequency and output current. The majority of AC switching
loss is also proportional to the square of input voltage.
For example, while the combination of VIN = 40V, VOUT
= 5V at 2A and fOSC = 200kHz may be easily achievable,
simultaneously raising VIN to 60V and fOSC to 700kHz is
not possible. Nevertheless, input voltage transients up to
60V can usually be accommodated, assuming the result-
ing increase in internal dissipation is of insufcient time
duration to raise die temperature signicantly.
A second consideration is controllability. A potential limita-
tion occurs with a high step-down ratio of VIN to VOUT, as
this requires a correspondingly narrow minimum switch
on time. An approximate expression for this (assuming
continuous mode operation) is given as follows:
min t
VV
Vf
ON
OUT
F
IN
OSC
=
+
()
where:
VIN = input voltage
VOUT = output voltage
VF = Schottky diode forward drop
fOSC = switching frequency
A potential controllability problem arises if the LT3430/
LT3430-1 are called upon to produce an on time shorter
than it is able to produce. Feedback loop action will lower
then reduce the VC control voltage to the point where
some sort of cycle-skipping or odd/even cycle behavior
is exhibited.
In summary:
1. Be aware that the simultaneous requirements of high
VIN, high IOUT and high fOSC may not be achievable in
practice due to internal dissipation. The Thermal Con-
siderations section offers a basis to estimate internal
power. In questionable cases a prototype supply should
be built and exercised to verify acceptable operation.
2. The simultaneous requirements of high VIN,lowVOUTand
high fOSC can result in an unacceptably short minimum
switch on time. Cycle skipping and/or odd/even cycle
behavior will result although correct output voltage is
usually maintained. The LT3430-1 100kHz switching
frequency will allow higher VIN/VOUT ratios without
pulse skipping.
FREQUENCY COMPENSATION
Before starting on the theoretical analysis of frequency
response, the following should be remembered—the
worse the board layout, the more difcult the circuit will
be to stabilize. This is true of almost all high frequency
analog circuits, read the Layout Considerations section
rst. Common layout errors that appear as stability prob-
lems are distant placement of input decoupling capacitor
and/or catch diode, and connecting the VC compensation
to a ground track carrying signicant switch current. In
addition, the theoretical analysis considers only rst
order non-ideal component behavior. For these reasons,
it is important that a nal stability check is made with
production layout and components.
The LT3430/LT3430-1 use current mode control. This al-
leviates many of the phase shift problems associated with
the inductor. The basic regulator loop is shown in Figure
10. The LT3430/LT3430-1 can be considered as two gm
blocks, the error amplier and the power stage.
Figure 11 shows the overall loop response. At the VC
pin, the frequency compensation components used are:
RC = 3.3k, CC = 0.022F and CF = 220pF. The output
capacitor used is a 100F, 10V tantalum capacitor with
typical ESR of 100mΩ. LT3430-1 uses two of these
capacitors in parallel.
The ESR of the tantalum output capacitor provides a use-
ful zero in the loop frequency response for maintaining
APPLICATIONS INFORMATION
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相关代理商/技术参数 |
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| LT3430EFE-1#PBF | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT3430EFE-1#TRPBF | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3430EFEPBF | 制造商:Linear Technology 功能描述:LT3430 adj 3A Buck SD dc-dc converter |
| LT3430IFE | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT3430IFE#PBF | 功能描述:IC REG BUCK ADJ 3A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
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