参数资料
型号: LT3430EFE-1
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 6.5 A SWITCHING REGULATOR, 120 kHz SWITCHING FREQ-MAX, PDSO16
封装: 4.40 MM, PLASTIC, TSSOP-16
文件页数: 15/28页
文件大小: 321K
代理商: LT3430EFE-1
LT3430/LT3430-1
22
34301fa
stability. This ESR, however, contributes signicantly to
the ripple voltage at the output (see Output Ripple Voltage
in the Applications Information section). It is possible to
reduce capacitor size and output ripple voltage by replac-
ing the tantalum output capacitor with a ceramic output
capacitor because of its very low ESR. The zero provided
by the tantalum output capacitor must now be reinserted
back into the loop. Alternatively, there may be cases where,
even with the tantalum output capacitor, an additional
zero is required in the loop to increase phase margin for
improved transient response.
A zero can be added into the loop by placing a resistor (RC)
at the VC pin in series with the compensation capacitor,
CC, or by placing a capacitor (CFB) between the output
and the FB pin.
When using RC, the maximum value has two limitations.
First, the combination of output capacitor ESR and RC
may stop the loop rolling off altogether. Second, if the
loop gain is not rolled off sufciently at the switching
frequency, output ripple will perturb the VC pin enough to
cause unstable duty cycle switching similar to subharmonic
oscillations. If needed, an additional capacitor (CF) can be
added across the RC/CC network from the VC pin to ground
to further suppress VC ripple voltage.
With a tantalum output capacitor, the LT3430/LT3430-1
already includes a resistor (RC) and lter capacitor (CF)
at the VC pin (see Figures 10 and 11) to compensate the
loop over the entire VIN range (to allow for stable pulse
skipping for high VIN-to-VOUTratios≥10).Aceramicoutput
capacitor can still be used with a simple adjustment to the
resistor RC for stable operation (see Ceramic Capacitors
section for stabilizing LT3430). If additional phase margin
is required, a capacitor (CFB) can be inserted between the
output and FB pin but care must be taken for high output
voltage applications. Sudden shorts to the output can create
unacceptably large negative transients on the FB pin.
For VIN-to-VOUT ratios < 10, higher loop bandwidths are
possible by readjusting the frequency compensation
components at the VC pin.
When checking loop stability, the circuit should be operated
over the application’s full voltage, current and tempera-
ture range. Proper loop compensation may be obtained
by empirical methods as described in Application Notes
19 and 76.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for example,
a battery powered device with a wall adapter input, the
output of the LT3430/LT3430-1 can be held up by the
backup supply with the LT3430/LT3430-1 input discon-
nected. In this condition, the SW pin will source current
into the VIN pin. If the SHDN pin is held at ground, only the
shut down current of 30A will be pulled via the SW pin
from the second supply. With the SHDN pin oating, the
APPLICATIONS INFORMATION
+
1.22V
VSW
VC
LT3430/LTC3430-1
GND
3430 F10
R1
OUTPUT
ESR
CF
CC
RC
RO
200k
ERROR
AMPLIFIER
FB
R2
C1
RLOAD
CURRENT MODE
POWER STAGE
gm = 2mho
gm =
2000
mho
+
TANTALUM
ESL
C1
CERAMIC
CFB
FREQUENCY (Hz)
GAIN
(dB)
80
60
40
20
0
–20
–40
PHASE
(DEG)
180
150
120
90
60
30
0
3430 F11
GAIN
PHASE
10
VIN = 42V
VOUT = 5V
ILOAD = 1A
COUT = 100F, 10V, 0.1
1k
10k
1M
100
100k
RC = 3.3k
CC = 22nF
CF = 220pF
Figure 10. Model for Loop Response
Figure 11. Overall Loop Response
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