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参数资料
| 型号： | LT3439EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC REG PSH-PLL CTRLR ISO 16TSSOP |
| 标准包装： | 95 |
| 类型： | 推挽式控制器，隔离式 |
| 输出数： | 1 |
| 输入电压： | 2.8 V ~ 17.5 V |
| 频率 - 开关： | 20kHz ~ 250kHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 16-TSSOP-EP |
| 产品目录页面： | 1331 (CN2011-ZH PDF) |
LT3439
APPLICATIO S I FOR ATIO
L PRI = V IN
current. This can be accomplished by adding more turns
onto a given core or selecting a new core with a higher
inductance per turn squared characteristic (A L ).
The following equation can be used to set the transformer
primary inductance:
t ON
? I
t ON can be calculated by 1/f OSC .
? I is somewhat arbitrary but a general rule of thumb is to
set it between 10% to 30% of I PRI where I PRI is calculated
as follows:
of the switching cycle do not match, the transformer’s flux
level walks up the BH curve and the transformer goes into
saturation. This is undesirable because the effective mag-
netizing inductance drops off and the magnetizing current
increases rapidly. Fortunately, there are parasitics in the
circuit that counteract the transformer saturation. When
the transformer begins to saturate the magnetizing cur-
rent increases in one half of the switching cycle and
therefore, the IR drops increase thereby reducing the volt/
second product of that half cycle. The transformer balance
is maintained. Also, the losses in the transformer and the
main switches have positive temperature coefficients elimi-
nating the potential for thermal runaway. The LT3439 can
I PRI =
V OUT ? I OUT
V IN Eff
compensate for small circuit imbalances, however care
should be taken to balance both sides of the circuit
including transformer design and PCB layout.
Eff can be estimated at 70%.
Winding Resistance
Resistance in either the primary or secondary winding will
reduce overall efficiency and degrade load regulation. If
efficiency or load regulation is unsatisfactory, verify that
the voltage drops in the transformer windings are not
excessive.
Leakage Inductance
Transformer Design Example
The following is an example of the design of a DC trans-
former for a 5V to 5V at 500mA supply.
Supply specs: V IN = 5V, V OUT = 5V, I OUT = 500mA,
f OSC = 100kHz
Assume: V F = 0.5V (forward voltage of output diode)
Efficiency ≈ 70%
Calculate the primary switch current (I PRI ):
= = 0 . 714 A
When the output switches turn off, the transformer leak-
age inductance causes a voltage spike on the output
switch collector. The size of the voltage spike is propor-
I PRI =
V OUT ? I OUT
V IN Eff
5 V ? 500 mA
5 V ? 70 %
= OUT F =
= 1 . 22
tional to the magnitude of the leakage inductance and to
the square of the load current (energy stored in the leakage
inductance). The voltage spike should be limited so that it
does not exceed the voltage breakdown of the output
switches. This can be accomplished by reducing the
transformer’s leakage inductance or by reducing the maxi-
mum slew rate. The voltage slew control will limit the
voltage spike by dissipating the leakage energy in the
power switches.
Transformer Imbalance
The “Switch Voltage Drop vs Switch Current” Typical
Performance curve gives a typical value of the switch
voltage drop (V SW ) for a given switch current (I PRI ). In this
example, I PRI ≈ 0.7A, therefore V SW ≈ 0.5V.
Next, calculate the turns ratio:
N S V + V 5 V + 0 . 5 V
N P V IN – V SW 5 V – 0 . 5 V
Add 15% margin to account for winding resistance of the
transformer:
A common concern for the push-pull topology is trans-
former imbalance. If the volt/second products of each half
N S
N P
= 1 . 22 + 15 % = 1 . 41
sn3439 3439fs
9
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