参数资料
型号: LT3510IFE#TRPBF
厂商: Linear Technology
文件页数: 10/30页
文件大小: 0K
描述: IC REG BUCK ADJ 2A DL 20TSSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 2
输出电压: 0.8 V ~ 23.8 V
输入电压: 3.1 V ~ 25 V
PWM 型: 电流模式
频率 - 开关: 250kHz ~ 1.5MHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 20-TSSOP-EP

LT3510
BLOCK DIAGRAM
R T /SYNC
CLK1
ONE CHANNEL
V IN
R3
V IN1
INTERNAL
REGULATOR
AND
REFERENCE
OSCILLATOR
AND
AGC
CLK2
DROPOUT
ENHANCEMENT
BST
C
3μA
SHDN
+
1.28V
7μA
+
SHUTDOWN
COMPARATOR
POR
SLOPE
COMPENSATION
S
R
PRE
Q
DRIVER
CIRCUITRY
+
SW
IND
C3
L1
D
UNDERVOLTAGE
TSD
+
V OUT
D
0.8V
+
R1
C
S
LOWEST
VOLTAGE
V C CLAMP
FB
R2
R Q
POWER GOOD
3.25A
COMPARATOR
PGOOD
GND
SOFT-START
RESET
+
80mV
SS CLAMP
+
0.72V
COMPARATOR
3510 BD
SS
V C
C
Figure 1. Block Diagram (One of Two Switching Regulators Shown)
APPLICATIONS INFORMATION
The LT3510 is dual channel, constant frequency, current
mode buck converter with internal 2A switches. Each
channel is identical with a common shutdown pin, internal
regulator, oscillator, undervoltage detect, thermal shutdown
and power-on reset.
If the SHDN pin is taken below its 1.28V threshold the
LT3510 will be placed in a low quiescent current mode.
In this mode the LT3510 typically draws 9μA from V IN1
and <1μA from V IN2 . In shutdown mode the PG is active
with a typical sink capability of 50μA for V IN1 voltage
When the SHDN pin is opened or driven above 1.28V,
the internal bias circuits turn on generating an internal
regulated voltage, 0.8V FB , 0.975V R T /SYNC references,
and a POR signal which sets the soft-start latch.
As the R T /SYNC pin reaches its 0.975V regulation point,
the internal oscillator will start generating two clock sig-
nals 180° out of phase for each regulator at a frequency
determined by the resistor from the R T /SYNC pin to ground.
Alternatively, if a synchronization signal is detected by the
LT3510 at the R T /SYNC pin, clock signals 180° out of phase
greater than 2V.
3510fe
10
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