参数资料
型号: LT3640IUFD#PBF
厂商: Linear Technology
文件页数: 16/24页
文件大小: 0K
描述: IC REG BUCK FIX/ADJ DL 28QFN
标准包装: 73
类型: 降压(降压)
输出类型: 两者兼有
输出数: 2
输出电压: 1.8V,3.3V,可调
输入电压: 2.5 V ~ 35 V
PWM 型: 电流模式,混合
频率 - 开关: 500kHz ~ 2MHz
电流 - 输出: 1.1A,1.3A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
包装: 管件
供应商设备封装: 28-QFN(4x5)
LT3640
APPLICATIONS INFORMATION
t SS 1 = C SS 1 ?
t SS 2 = C SS 2 ?
BSTandSWPinConsiderations
The high voltage channel requires an external capacitor
between the BST and SW pins and an external boost diode
from a voltage source to the BST pin. In most cases, a
0.22μF capacitor will work well. The (BST-SW) voltage
cannot exceed 5.5V, and must be more than 2.3V for best
efficiency. Connect the boost diode to any voltage between
2.7V and 5.5V. The V IN2 pin is the best choice if the low
voltage channel is used.
The high voltage channel will not start until the (BST-SW)
voltage is 2V or above. When the LT3640 is enabled, an
internal ~5mA current source from V IN flows out of the BST
pin. The SW pin is disconnected from the SW1 pin, and is
pulled down by an internal current source to ground. The
external boost capacitor can be charged up regardless of
the output. When the (BST-SW) voltage reaches 2V, the SW
pin is connected to the SW1 pin, and the high voltage chan-
nel starts switching. However, the internal bipolar power
switch cannot be fully saturated until the (BST-SW) voltage
is further charged to above 2.3V. To start up a traditional
nonsynchronous buck regulator with very light load, the
input voltage needs to be a couple of volts higher than
the minimum running input voltage if the input voltage is
ramping up slowly. The LT3640’s unique boost capacitor
charging scheme solves this start-up issue. Figure 3 shows
that the minimum input voltage to start the high voltage
channel nonsynchronous buck regulator of the LT3640 is
5
very close to the minimum input voltage to regulate the
output voltage for most of the load range.
Soft-Start
The LT3640 has a soft-start pin for each channel. The
feedback pin voltage is regulated to the lower of the cor-
responding SS pin and the internal references, which is
1.265V for the high voltage channel, and 600mV for the low
voltage channel. A capacitor from the SS pin to ground is
charged by an internal 2μA current source resulting in an
output ramping linearly from 0V to the regulated voltage.
The duration of the ramp is:
1 . 265 V
2 μA
600 mV
2 μA
where t SS1 is the ramping time for the SS1 pin, t SS2 is
the ramping time for the SS2 pin, C SS1 is the capacitance
from the SS1 pin to ground, and C SS2 is the capacitance
from the SS2 pin to ground.
At power-up, a latch is set to discharge the SS1 pin.
After the SS1 pin is discharged to below 100mV, the latch
is reset. The internal 2μA current source starts to charge
the SS1 pin when the (BST-SW) voltage is charged to
above 2V.
5
4
START
RUN
4
START
RUN
3
2
1
3
2
1
0
0.001
0.01 0.1
1
0
0.001
0.01 0.1
1
V OUT CURRENT (A)
(3a) F S = 2MHz
3640 F03a
V OUT CURRENT (A)
(3b) F S = 500kHz
3640 F03b
Figure 3. High Voltage Channel Minimum Input Voltage for V OUT1 = 3.3V
3640f
  
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