参数资料
型号: LT3680EMSE#TRPBF
厂商: Linear Technology
文件页数: 17/24页
文件大小: 0K
描述: IC REG BUCK ADJ 3.5A 10MSOP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.79 V ~ 30 V
输入电压: 3.6 V ~ 36 V
PWM 型: 电流模式,混合
频率 - 开关: 230kHz ~ 2.45MHz
电流 - 输出: 3.5A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 10-MSOP 裸露焊盘
LT3680
APPLICATIONS INFORMATION
traces will shield them from the SW and BOOST nodes.
L1
V OUT
C2
The Exposed Pad on the bottom of the package must be
soldered to ground so that the pad acts as a heat sink. To
keep thermal resistance low, extend the ground plane as
R RT
C C
R C
R2
R1
much as possible, and add thermal vias under and near
the LT3680 to additional ground planes within the circuit
board and on the bottom side.
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
D1
C1
bypass capacitor of LT3680 circuits. However, these capaci-
GND
R PG
3680 F09
tors can cause problems if the LT3680 is plugged into a
live supply (see Linear Technology Application Note 88 for
VIAS TO LOCAL GROUND PLANE
VIAS TO V OUT VIAS TO SYNC
VIAS TO RUN/SS
VIAS TO PG
VIAS TO V IN
OUTLINE OF LOCAL
GROUND PLANE
a complete discussion). The low loss ceramic capacitor,
combined with stray inductance in series with the power
Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation
CLOSING SWITCH
source, forms an under damped tank circuit, and the
DANGER
SIMULATES HOT PLUG
I IN
V IN
LT3680
V IN
20V/DIV
RINGING V IN MAY EXCEED
+
4.7μF
ABSOLUTE MAXIMUM RATING
LOW
IMPEDANCE
ENERGIZED
STRAY
INDUCTANCE
DUE TO 6 FEET
I IN
10A/DIV
24V SUPPLY
(2 METERS) OF
TWISTED PAIR
0.7W
LT3680
(10a)
V IN
20V/DIV
20μs/DIV
+
0.1μF
4.7μF
I IN
10A/DIV
(10b)
V IN
20μs/DIV
LT3680
20V/DIV
+
22μF
35V
+
4.7μF
AI.EI.
I IN
10A/DIV
(10c)
20μs/DIV
3680 F10
Figure 10. A Well Chosen Input Network Prevents Input Voltage Overshoot and
Ensures Reliable Operation when the LT3680 is Connected to a Live Supply
3680fb
17
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