参数资料
型号: LT3692EUH#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 5.8 A DUAL SWITCHING CONTROLLER, 2750 kHz SWITCHING FREQ-MAX, PQCC32
封装: 5 X 5 MM, LEAD FREE, PLASTIC, MO-220WHHD, QFN-32
文件页数: 13/36页
文件大小: 526K
代理商: LT3692EUH#PBF
LT3692
20
3692f
APPLICATIONS INFORMATION
Shutdown and Undervoltage/Overvoltage Lockout
Typically, undervoltage lockout (UVLO) is used in situa-
tions where the input supply is current limited, or has a
relatively high source resistance. A switching regulator
draws constant power from the source, so source cur-
rent increases as source voltage drops. This looks like a
negative resistance load to the source and can cause the
sourcetocurrentlimitorlatchlowunderlowsourcevoltage
conditions. UVLO prevents the regulator from operating
at source voltages where these problems might occur.
Overvoltage lockout (OVLO) is typically used to shut down
the switching regulator during potentially harmful input
voltage transients.
Referring to Figure 14, if the SHDN pin is connected to
VIN, then the overvoltage lockout threshold is set to the
typical maximum value of 38V.
Additionally, an internal comparator will force both chan-
nels into shutdown below the minimum VIN1 of 2.8V.
This feature can be used to prevent excessive discharge
of battery-operated systems. In addition to the VIN1 un-
dervoltage lockout, both channels will be disabled when
SHDN1 is less than 1.3V.
Programmable UVLO may be implemented using an input
voltage divider and one of the internal comparators (see
the Typical Applications section).
When the SHDN pin is taken above 1.3V, its respective
channel is allowed to operate. When the SHDN pin is
driven below 1.3V, its channel is placed in a low quiescent
current state. There is no hysteresis on the SHDN pins. If
the SHDN pins are not connected to VIN, then an internal
clamp regulates the SHDN pin voltage to 2.5V.
If the SHDN pin is driven by a logic signal greater than
2.5V, a series resistor is required to limit the current into
the SHDN pin to no more than 10A.
Referring to Figure 15, a 249k resistor will suffice for
a typical logic-level signal. If the logic signal is 5V or
greater, choose a current limiting resistor equal to RSHDN=
(VLOGIC – 2.5V)/10A. Place a small Schottky diode (such
as a BAT54) in parallel to the current-limiting resistor as
shown in Figure 15.
KeeptheconnectionsfromanyseriesresistorstotheSHDN
pins short and make sure that the interplane or surface
capacitance to switching nodes is minimized.
Figure 14. Connect SHDN to VIN to Select Default OVLO and UVLO
Figure 15. External Control of the SHDN Pin
+
+
1.3V
38V
THERMAL
SHUTDOWN
SHDN1
VINX
LT3692
3692 F15
CHANNEL
DISABLE
LT3692
3692 F15
SHDN
RSHDN
+
SCHOTTKY
OPTIONAL
IF VLOGIC < 5V
VLOGIC
Soft-Start
The output of the LT3692 regulates to the lowest voltage
presentateithertheSSpinoraninternal0.806Vreference.
A capacitor from the SS pin to ground is charged by an
internal 12A current source resulting in a linear output
ramp from 0V to the regulated output whose duration is
given by:
tRAMP =
CSS 0.806V
12A
At power-up, a reset signal sets the soft-start latch and
discharges both SS pins to approximately 0V to ensure
proper start-up. When both SS pins are fully discharged
the latch is reset and the internal 12A current source
starts to charge the SS pin.
When the SS pin voltage is below 115mV, the VC pin is
pulled low which disables switching. This allows the SS
pin to be used as an individual shutdown for each channel.
As the SS pin voltage rises above 90mV, the VC pin is re-
leased and the output is regulated to the SS voltage. When
the SS pin voltage exceeds the internal 0.806V reference,
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